IP Library Granted Patent US 10,340,879
Granted Patent B2
US 10,340,879 · App. 15/787,374 · Granted Jul 2, 2019

Switching circuit

Inventors: Anton Mavretic (Natick, MA); Ian M. Costanzo (Worcester, MA); Ronald Anthony Decker (Turnersville, NJ)
H03H7/40G01R19/165H01J37/32082H01J37/32183H01L21/02274H01L21/3065H01L21/31116H01L21/31138H01L21/32136H01L27/0605H01L28/20H01L28/40H01L29/2003H01L29/7787H01L29/861H02M1/08H02M3/33569H03H7/38H03K17/687H04B1/44H01J2237/334H03K17/102H03K17/691H03K17/7955H03K2017/6875
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Quick Facts
Patent No.
US 10,340,879
App. No.
15/787,374
Granted
Jul 2, 2019
Kind
B2
Abstract

In one embodiment, an impedance matching network is disclosed that includes a first circuit comprising a first variable component providing a first variable capacitance or inductance, and a second circuit comprising a second variable component providing a second variable capacitance or inductance. Each of the first circuit and the second circuit includes plurality of switching circuits configured to provide the first variable capacitance or inductance and the second variable capacitance or inductance. Each of the plurality of switching circuits includes a diode and a driver circuit configured to switch the diode. The driver circuit includes a first switch, a second switch coupled in series with the first switch, and a filter circuit that is coupled at a first end between the first switch and the second switch, and is operably coupled at a second end to the diode.

Claims (109)

1. An impedance matching network comprising:

an RF input configured to couple to an RF source;

an RF output configured to couple to a load;

a first circuit comprising a first variable component providing a first variable capacitance or inductance; and

a second circuit comprising a second variable component providing a second variable capacitance or inductance;

wherein each of the first circuit and the second circuit comprises a plurality of switching circuits configured to provide the first variable capacitance or inductance and the second variable capacitance or inductance, respectively, each of the plurality of switching circuits comprising:

a diode having an anode that is operably coupled to a ground; and

a driver circuit operably coupled to a cathode of the diode and configured to switch the diode, the driver circuit comprising:

a first switch;

a second switch coupled in series with the first switch;

a filter circuit that is coupled at a first end between the first switch and the second switch, and is operably coupled at a second end to the diode;

a first driver operably coupled to the first switch;

a second driver operably coupled to the second switch; and

a third driver operably coupled to the first and second drivers, the third driver configured to:

provide a first signal to the first driver; and

provide a second driving signal to the second driver;

wherein, in providing the first and second signals, the third driver is configured to increase and decrease a duration of a dead time between (a) the third driver driving the first driver on and the second driver off, or (b) the third driver driving the second driver on and the first driver off.

2. A switching circuit comprising:

a diode; and

a driver circuit configured to switch the diode, the driver circuit comprising:

a first switch;

a second switch coupled in series with the first switch; and

a filter circuit that is coupled at a first end between the first switch and the second switch, and is operably coupled at a second end to the diode;

a first driver operably coupled to the first switch;

a second driver operably coupled to the second switch; and

a third driver operably coupled to the first and second drivers, the third driver configured to:

provide a first signal to the first driver; and

provide a second driving signal to the second driver;

wherein, in providing the first and second signals, the third driver is configured to increase and decrease a duration of a dead time between (a) the third driver driving the first driver on and the second driver off, or (b) the third driver driving the second driver on and the first driver off.

3. A semiconductor processing tool comprising:

a plasma chamber configured to deposit a material onto a substrate or etch a material from the substrate; and

an impedance matching circuit operably coupled to the plasma chamber, matching circuit comprising:

an RF input configured to be operably coupled to an RF source;

an RF output operably coupled to the plasma chamber;

a first circuit comprising a first variable component providing a first variable capacitance or inductance; and

a second circuit comprising a second variable component providing a second variable capacitance or inductance;

wherein each of the first circuit and the second circuit comprises a plurality of switching circuits configured to provide the first variable capacitance or inductance and the second variable capacitance or inductance, respectively, each of the plurality of switching circuits comprising:

a diode; and

a driver circuit operably coupled to the diode and configured to switch the diode, the driver circuit comprising:

a first switch;

a second switch coupled in series with the first switch; and

a filter circuit that is coupled at a first end between the first switch and the second switch, and is operably coupled at a second end to the diode;

a first driver operably coupled to the first switch;

a second driver operably coupled to the second switch; and

a third driver operably coupled to the first and second drivers, the third driver configured to:

provide a first signal to the first driver; and

provide a second driving signal to the second driver;

wherein, in providing the first and second signals, the third driver is configured to increase and decrease a duration of a dead time between (a) the third driver driving the first driver on and the second driver off, or (b) the third driver driving the second driver on and the first driver off.

4. A method of matching an impedance, the method comprising:

operably coupling a matching network between an RF source and a load, the matching network comprising:

a first circuit comprising a first variable component providing a first variable capacitance or inductance; and

a second circuit comprising a second variable component providing a second variable capacitance or inductance;

wherein each of the first circuit and the second circuit comprises a plurality of switching circuits, each of the plurality of switching circuits comprising:

a diode; and

a driver circuit configured to switch the diode, the driver circuit comprising:

a first switch;

a second switch coupled in series with the first switch;

a filter circuit that is coupled at a first end between the first switch and the second switch, and is operably coupled at a second end to the diode;

a first driver operably coupled to the first switch;

a second driver operably coupled to the second switch; and

a third driver operably coupled to the first and second drivers;

providing, by the third driver, a first signal to the first driver and a second signal to the second driver, wherein, in providing the first and second signals, the third driver is configured to increase and decrease a duration of a dead time between (a) the third driver driving the first driver on and the second driver off, or (b) the third driver driving the second driver on and the first driver off; and

providing the first variable capacitance or inductance or the second variable capacitance or inductance, respectively, by, for at least one switching circuit of the plurality of switching circuits, either switching on the first switch and switching off the second switch, or switching off the first switch and switching on the second switch.

5. The method of claim 4 wherein the diode is a PIN diode.

6. The method of claim 4 wherein the first and second switches are metal-oxide semiconductor field-effect transistors (MOSFETs).

7. The method of claim 4 wherein the filter circuit comprises an LC circuit.

8. The method of claim 4 wherein a drain of the first switch is coupled to a source of the second switch.

9. The method of claim 4 wherein the second end of the filter circuit is coupled to a cathode of the diode.

10. The method of claim 4

wherein the first and second signals substantially asynchronously drive the first and second drivers on and off.

11. The method of claim 4 wherein the duration of the dead time can be adjusted by varying a resistance of a potentiometer coupled to the third driver.

12. The method of claim 4 wherein the duration of the dead time is based on the inductance of an inductor forming part of the filter circuit.

13. A method of switching a diode comprising:

coupling a first switch and a second switch in series;

coupling a filter circuit at a first end between the first switch and the second switch;

operably coupling the filter circuit at a second end to a diode to be switched;

operably coupling a first driver to the first switch;

operably coupling a second driver to the second switch; and

operably coupling a third driver to the first and second drivers;

providing, by the third driver, a first signal to the first driver and a second signal to the second driver, wherein, in providing the first and second signals, the third driver is configured to increase and decrease a duration of a dead time between (a) the third driver driving the first driver on and the second driver off, or (b) the third driver driving the second driver on and the first driver off; and

either switching on the first switch and switching off the second switch, or switching off the first switch and switching on the second switch.

14. The method of claim 13 wherein the diode is a PIN diode.

15. The method of claim 13 wherein the first and second switches are metal-oxide semiconductor field-effect transistors (MOSFETs).

16. The method of claim 13 wherein the filter circuit comprises an LC circuit.

17. The method of claim 13 wherein a drain of the first switch is coupled to a source of the second switch.

18. The method of claim 13 wherein the second end of the filter circuit is coupled to a cathode of the diode.

19. The method of claim 13

wherein the first and second signals substantially asynchronously drive the first and second drivers on and off.

20. The method of claim 13 wherein the duration of the dead time can be adjusted by varying a resistance of a potentiometer coupled to the third driver.

21. A method of fabricating a semiconductor, the method comprising:

placing a substrate in a plasma chamber configured to deposit a material layer onto the substrate or etch a material layer from the substrate;

energizing plasma within the plasma chamber by coupling RF power from an RF source into the plasma chamber to perform a deposition or etching; and

while energizing the plasma, carrying out an impedance match by an impedance matching network coupled between a load and an RF source, wherein the impedance matching network comprises:

an RF input configured to couple to an RF source;

an RF output configured to couple to a load;

a first circuit comprising a first variable component providing a first variable capacitance or inductance; and

a second circuit comprising a second variable component providing a second variable capacitance or inductance;

wherein each of the first circuit and the second circuit comprises a plurality of switching circuits configured to provide the first variable capacitance or inductance and the second variable capacitance or inductance, respectively, each of the plurality of switching circuits comprising:

a diode; and

a driver circuit configured to switch the diode, the driver circuit comprising:

a first switch;

a second switch coupled in series with the first switch;

a filter circuit that is coupled at a first end between the first switch and the second switch, and is operably coupled at a second end to the diode;

a first driver operably coupled to the first switch;

a second driver operably coupled to the second switch; and

a third driver operably coupled to the first and second drivers, the third driver configured to:

 provide a first signal to the first driver; and

 provide a second driving signal to the second driver;

 wherein, in providing the first and second signals, the third driver is configured to increase and decrease a duration of a dead time between (a) the third driver driving the first driver on and the second driver off, or (b) the third driver driving the second driver on and the first driver off.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2023
From: RENO SUB-SYSTEMS, INC.
To: ASM AMERICA, INC.
Reel/Frame 065217/0896 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 2, 2023
From: RENO TECHNOLOGIES, INC.
To: RENO SUB-SYSTEMS, INC.
Reel/Frame 065091/0846 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2017
From: MAVRETIC, ANTON; COSTANZO, IAN M.; DECKER, RONALD ANTHONY
To: RENO TECHNOLOGIES, INC.
Reel/Frame 043896/0985 →
Continuity (8)
Continuation In Part 15667951 · Aug 3, 2017
Continuation 15384904 · Dec 20, 2016
Continuation In Part 15046585 · Feb 18, 2016
Continuation In Part 14734053 · Jun 9, 2015
Provisional Application 62118552 · Feb 20, 2015
Provisional Application 62117728 · Feb 18, 2015
Provisional Application 62409635 · Oct 18, 2016
Related Publication 20180041183A1 · Feb 8, 2018
Cited By (7)
US 12,243,717 US 12,272,522 US 12,288,673 US 12,334,306 US 12,334,307 US 12,444,573 US 12,646,686