Semiconductor device
A semiconductor device includes a compound semiconductor substrate including a gate region and an active region, a trench provided in a range between the gate region and the active region, a gate insulating film disposed in the trench, a source electrode, and a drain electrode. The gate region includes a first gate region of a p-type being in contact with the gate insulating film, a second gate region of the p-type having a p-type impurity concentration lower than a p-type impurity concentration of the first gate region, a third gate region of an n-type, and a fourth gate region of the p-type. The active region includes a source region of the n-type being in contact with the gate insulating film, a body region of the p-type facing the second gate region via the gate insulating film, and a drain region of the n-type.
1. A semiconductor device comprising:
a compound semiconductor substrate including a gate region and an active region;
a trench provided in an upper surface of the compound semiconductor substrate and provided in a range between the gate region and the active region;
a gate insulating film disposed in the trench;
a source electrode provided on an upper surface of the active region;
a drain electrode provided on a lower surface of the compound semiconductor substrate; and
a gate wiring provided on an upper surface of the gate region,
wherein
the gate region comprises:
a first gate region of a p-type being in direct contact with the gate insulating film and being in direct contact with the gate wiring;
a second gate region of the p-type being in direct contact with the gate insulating film below the first gate region and having a p-type impurity concentration lower than a p-type impurity concentration of the first gate region;
a third gate region of an n-type being in direct contact with the gate insulating film below the second gate region; and
a fourth gate region of the p-type being in direct contact with the gate insulating film below the third gate region and being in direct contact with the drain electrode,
the active region comprises:
a source region of the n-type being in direct contact with the source electrode and the gate insulating film;
a body region of the p-type being in direct contact with the source electrode, being in direct contact with the gate insulating film below the source region, and facing the second gate region via the gate insulating film; and
a drain region of the n-type being in direct contact with the gate insulating film below the body region and being in direct contact with the drain electrode.
2. The semiconductor device according to claim 1 , wherein
an upper end of the body region in a range in direct contact with the gate insulating film is positioned above an upper end of the second gate region in a range in direct contact with the gate insulating film.
3. The semiconductor device according to claim 1 , wherein
a lower end of the body region in a range in direct contact with the gate insulating film is positioned above a lower end of the second gate region in a range in direct contact with the gate insulating film.
4. The semiconductor device according to claim 1 , wherein
the drain region comprises:
a low concentration region being in contact with the body region and facing the second gate region via the gate insulating film; and
a high concentration region being in contact with the gate insulating film below the low concentration region, being in contact with the drain electrode, and having an impurity concentration higher than an impurity concentration of the low concentration region.
5. The semiconductor device according to claim 4 , wherein
the active region further comprises:
a drift region of the p-type being in contact with the low concentration region and the high concentration region, being in contact with the gate insulating film below the low concentration region and above the high concentration region, being separated from the body region by the low concentration region, and facing the second gate region via the gate insulating film.
6. The semiconductor device according to claim 1 , wherein a conductive layer does not exist in the trench and an entirety of the trench is filled with the gate insulating film.
7. The semiconductor device according to claim 1 , wherein the first gate region is insulated from the source electrode.