IP Library Patent Application 15793032
Patent Application
App. No. 15/793,032

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Quick Facts
Patent No.
US None
App. No.
15/793,032
Abstract

A device structure providing contact to conductive layers via a deep trench structure is disclosed. The device includes a first dielectric layer including a first opening. A first conductive layer is deposited over the first dielectric layer and the first opening. A second dielectric layer is deposited on the first conductive layer. The second dielectric layer includes a second opening. A second conductive layer is deposited over the second dielectric layer and the first and second openings. A semiconductor layer is deposited on the second dielectric layer such that the semiconductor layer is not continuous on at least part of the walls of the first or second openings. A top electrode layer is deposited on the semiconductor layer. The top electrode layer is in contact with the second conductive layer on at least part of the walls of the first or second openings.

Claims (29)

1 - 20 . (canceled)

21 . A device comprising:

a backplane;

a first conductor layer on the backplane, the first conductor layer having a pattern with a plurality of edges;

a semiconductor layer deposited on the first conductor layer; and

a second conductor layer deposited on the semiconductor layer, the second conductor layer in contact with the first conductor layer on at least one of the plurality of edges, a resistance of the first conductor layer less than a resistance of the second conductor layer.

22 . The device of claim 21 , wherein the first conductor layer includes a plurality of strips.

23 . The device of claim 21 , wherein the first conductor layer includes a mesh structure having openings with the plurality of edges.

24 . The device of claim 21 , wherein the second conductor layer is transparent.

25 . The device of claim 21 , wherein the semiconductor layer comprises organic material forming part of one or more organic light emitting diodes.

26 . The device of claim 21 , wherein a thickness of the semiconductor layer is less than a thickness of the first conductor layer.

27 . The device of claim 26 , wherein, at said at least one of the plurality of edges, said semiconductor layer separates a top surface of said first conductor layer from said second conductor layer.

28 . The device of claim 26 , wherein the semiconductor layer is deposited continuously on a top surface of the first conductor layer where said top surface meets said at least one of the plurality of edges.

29 . The device of claim 21 , wherein said first conductor layer comprises a low resistance conductor material and said second conductor layer comprises a high resistance conductor material.

30 . A method of forming a device, the method comprising:

forming a backplane layer;

depositing a first conductive layer on the backplane;

patterning the first conductive layer to create a plurality of edges in the first conductive layer;

depositing a semiconductor layer on the first conductor layer; and

depositing a second conductor layer on the semiconductor layer, the second conductor layer in contact with the first conductor layer on at least one of the plurality of edges, a resistance of the first conductor layer less than a resistance of the second conductor layer.

31 . The method of claim 30 , wherein the pattern of the first conductor layer includes a plurality of strips.

32 . The method of claim 30 , wherein the pattern of the first conductor layer includes a mesh structure having openings with the plurality of edges.

33 . The method of claim 30 , wherein the second conductor layer is transparent.

34 . The method of claim 30 , wherein the semiconductor layer comprises organic material forming part of one or more organic light emitting diodes.

35 . The method of claim 30 , wherein said depositing the semiconductor layer is such that a thickness of the semiconductor layer is less than a thickness of the first conductor layer.

36 . The method of claim 35 , wherein depositing the semiconductor layer is performed without the use of shadow masking near said at least one of the plurality of edges.

37 . The method of claim 35 , wherein depositing the semiconductor layer is such that after said depositing of said second conductor layer, at said at least one of the plurality of edges, said semiconductor layer separates a top surface of said first conductor layer from said second conductor layer.

38 . The method of claim 35 , wherein depositing the semiconductor layer comprises depositing the semiconductor layer continuously on a top surface of the first conductor layer where said top surface meets said at least one of the plurality of edges.

39 . The method of claim 30 , wherein said first conductor layer comprises a low resistance conductor material and said second conductor layer comprises a high resistance conductor material.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2017
From: CHAJI, GHOLAMREZA
To: IGNIS INNOVATION INC.
Reel/Frame 043944/0471 →