IP Library Granted Patent US 10,547,098
Granted Patent B2
US 10,547,098 · App. 15/800,887 · Granted Jan 28, 2020

Double loop antenna

Inventors: Sang Beom Lee (Suwon-si, KR); Hyung Wook Cho (Suwon-si, KR); Jun Seung Yi (Suwon-si, KR); Yu Jin Lee (Suwon-si, KR); Jae Suk Sung (Suwon-si, KR); Dae Ki Lim (Suwon-si, KR); Seung Hun Ryu (Suwon-si, KR); Ki Won Chang (Suwon-si, KR); Jae Hyoung Cho (Suwon-si, KR); Si Hyung Kim (Suwon-si, KR)
Assignee: WITS Co., Ltd.
H01Q1/22H01F38/14H01P7/005H01Q7/00H04B5/0081H01Q25/00
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,547,098
App. No.
15/800,887
Granted
Jan 28, 2020
Kind
B2
Abstract

A double loop antenna includes a source loop comprising: a spiral-shaped conductive source coil pattern disposed on a top surface of a board, and a source capacitor pattern comprising symmetrical conductive patterns disposed on the top surface and a bottom surface of the board; and a resonance loop comprising: a spiral-shaped conductive resonance coil pattern disposed on the bottom surface of the board, and a resonance capacitor pattern comprising symmetrical conductive patterns disposed on the top surface and the bottom surface of the board, wherein the source coil pattern and the resonance coil pattern are formed on different surfaces of the board.

Claims (20)

1. A double loop antenna comprising:

a source loop comprising:

a spiral-shaped conductive source coil pattern disposed on a top surface of a board, and

a source capacitor pattern comprising symmetrical conductive patterns disposed on the top surface and a bottom surface of the board; and

a resonance loop comprising:

a spiral-shaped conductive resonance coil pattern disposed on the bottom surface of the board, and

a resonance capacitor pattern comprising symmetrical conductive patterns disposed on the top surface and the bottom surface of the board,

wherein the source coil pattern and the resonance coil pattern are formed on different surfaces of the board.

2. The double loop antenna of claim 1 , wherein the source coil pattern and the resonance coil pattern are disposed on different regions in a thickness direction of the board.

3. The double loop antenna of claim 1 , wherein the source capacitor pattern extends from the source coil pattern.

4. The double loop antenna of claim 3 , wherein the conductive patterns of the source capacitor pattern and the source coil pattern have the same line width and thickness.

5. The double loop antenna of claim 1 , wherein the source capacitor pattern is disposed on an outer periphery of the board.

6. The double loop antenna of claim 1 , wherein the resonance capacitor pattern extends from the resonance coil pattern.

7. The double loop antenna of claim 1 , wherein the resonance capacitor pattern is surrounded by the source coil pattern and the resonance coil pattern.

8. The double loop antenna of claim 1 , wherein the resonance capacitor pattern comprises a spiral shape.

9. The double loop antenna of claim 1 , wherein the conductive patterns of the source capacitor pattern comprise a metal-insulator-metal (MIM) capacitor.

10. The double loop antenna of claim 1 , wherein the conductive patterns of the resonance capacitor pattern comprise a metal-insulator-metal (MIM) capacitor.

11. The double loop antenna of claim 1 , wherein the board comprises an inner layer, and

a conductive pattern of the inner layer is symmetrical with either one or both of the conductive patterns of the source capacitor pattern and the conductive patterns of the resonance capacitor pattern.

12. The double loop antenna of claim 1 , wherein the source loop and the resonance loop are electrically separated from each other.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 20, 2019
From: SAMSUNG ELECTRO-MECHANICS CO., LTD.
To: WITS CO., LTD.
Reel/Frame 050451/0803 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2017
From: LEE, SANG BEOM; CHO, HYUNG WOOK; YI, JUN SEUNG; LEE, YU JIN; SUNG, JAE SUK; LIM, DAE KI; RYU, SEUNG HUN; CHANG, KI WON; CHO, JAE HYOUNG; KIM, SI HYUNG
To: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Reel/Frame 044348/0301 →
Priority Claims (1)
KR 10-2017-0008803 · Jan 18, 2017 · national
Continuity (1)
Related Publication 20180205132A1 · Jul 19, 2018