IP Library Granted Patent US 10,116,391
Granted Patent B2
US 10,116,391 · App. 15/802,338 · Granted Oct 30, 2018

Off quadrature Mach-Zehnder modulator biasing

Inventors: Todd Rope (Santa Clara, CA); Radhakrishnan L. Nagarajan (Santa Clara, CA); Hari Shankar (Santa Clara, CA)
Assignee: INPHI CORPORATION
H04B10/516
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Quick Facts
Patent No.
US 10,116,391
App. No.
15/802,338
Filed
Nov 2, 2017
Granted
Oct 30, 2018
Kind
B2
Art Unit
2883
USPC
385/1
Abstract

The present invention relates to telecommunication techniques and integrated circuit (IC) devices. More specifically, embodiments of the present invention provide an off-quadrature modulation system. Once an off-quadrature modulation position is determined, a ratio between DC power transfer amplitude and dither tone amplitude for a modulator is as a control loop target to stabilize off-quadrature modulation. DC power transfer amplitude is obtained by measuring and sampling the output of an optical modulator. Dither tone amplitude is obtained by measuring and sampling the modulator output and performing calculation using the optical modulator output values and corresponding dither tone values. There are other embodiments as well.

Claims (43)

1. A method for operating an off-quadrature modulation system, the method comprising:

selecting an input value for performing an optical modulation process by an optical modulator;

providing a lookup table, the lookup table comprising an array of n sine values based on a plurality of n dither frequencies, the lookup table further comprising an array of n cosine values based on the plurality of n dither frequencies;

obtaining n measured values of outputs generated by the optical modulator corresponding to the plurality of n dither frequencies;

determining a first sum using the n measured values;

calculating an array of n in-phase values using the array of n sine values and corresponding n measured values;

calculating an array of n quadrature values using the array of n cosine values and the corresponding n measured values;

determining a second sum using the array of n in-phase values and the array of n quadrature values;

calculating a ratio between the first sum and the second sum; and

adjusting the input value using the ratio as a target of a control loop to stabilize the optical modulator.

2. The method of claim 1 wherein the n measured values are sequential.

3. The method of claim 1 further comprising storing the n measured values at a first buffer.

4. The method of claim 1 further comprising performing analog to digital conversion to obtain the n measured values.

5. The method of claim 1 wherein the input value is associated with a phase trim adjustment signal generated by a microcontroller unit.

6. The method of claim 1 further comprising repeating steps for determining the first sum.

7. The method of claim 1 wherein the control loop comprises a proportional-integral-derivative (PID) controller.

8. The method of claim 1 further comprising performing phase trimming by an optical modulator.

9. The method of claim 1 further where n is greater than 100.

10. An off-quadrature biased optical modulation system comprising:

a driver module comprising a dither tone generator, the driver module being configured to output a driving signal, the driving signal including an RF component and a dither tone component;

a memory for storing a lookup table, the lookup table comprising an array of n sine values based on a plurality of n dither frequencies, the lookup table further comprising an array of n cosine values based on the plurality of n dither frequencies;

a light source;

an optical modulator being configured to generate a modulated light signal and a dump signal using the light source and the driving signal;

an analog to digital converter (ADC) being configured to sample the dump signal to generate n dump samples;

a microcontroller unit being configured to calculate a ratio based a first sum and the second sum, the first sum being based on the n dump samples, the second sum being based on the n dump samples and the array of n cosine values and the array of n sine values; and

a control module being configured to stabilize the optical modulator at off-quadrature positions using at least the ratio.

11. The system of claim 10 further comprising a TIA for amplifying the dump signal, the n dump samples being based on second harmonic amplitude of the dump signal.

12. The system of claim 10 wherein the control module comprises a PID control loop.

13. The system of claim 10 further comprising an RF source coupled to the driver module.

14. The system of claim 10 wherein the microcontroller unit is configured to provide phase trim signals to adjust the modulated light signal.

15. The system of claim 10 wherein the microcontroller unit is further configured to calculate n in-phase values based on the array of n sine values and the corresponding n dump samples.

16. The system of claim 10 further comprising an external clock output.

17. An off-quadrature biased optical modulation system comprising:

a driver module configured to output a driving signal, the driving signal including an RF component and a dither tone component;

a memory for storing a lookup table, the lookup table comprising an array of n sine values based on a plurality of n dither frequencies, the lookup table further comprising an array of n cosine values based on the plurality of n dither frequencies;

a light source;

an optical modulator being configured to generate a modulated light signal and a dump signal using the light source and the driving signal;

an analog to digital converter (ADC) being configured to sample the dump signal to generate n dump samples;

a microcontroller unit being configured to calculate a ratio based a first sum and the second sum, the first sum being based on the n dump samples, the second sum being at least based on the n dump samples and the array of n sine values; and

a control module being configured to adjust one or more output parameters using at least the ratio.

18. The device of claim 17 wherein the second sum is further based on an array of n quadrature components, the n quadrature components being calculated using the array of n cosine values and corresponding array of n dump samples.

19. The device of claim 17 wherein the microcontroller unit comprises a clock signal generator for providing a clock signal, the clock signal being used by the driver to generate the dither tone signal.

20. The device of claim 17 wherein the microcontroller unit comprises a random-access memory.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2021
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE LTD.
Reel/Frame 057336/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2021
From: MARVELL TECHNOLOGY CAYMAN I
To: CAVIUM INTERNATIONAL
Reel/Frame 057279/0519 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2021
From: INPHI CORPORATION
To: MARVELL TECHNOLOGY CAYMAN I
Reel/Frame 056649/0823 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2017
From: ROPE, TODD; NAGARAJAN, RADHAKRISHNAN L.; SHANKAR, HARI
To: INPHI CORPORATION
Reel/Frame 044084/0575 →
Continuity (3)
Continuation 14984849 · Dec 30, 2015
Continuation In Part 14706908 · May 7, 2015
Related Publication 20180062751A1 · Mar 1, 2018
Cited By (1)
US 12,254,844