IP Library Granted Patent US 10,382,054
Granted Patent B2
US 10,382,054 · App. 15/809,284 · Granted Aug 13, 2019

Analog front end (AFE) for quantization noise-limited sensor apparatus

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Quick Facts
Patent No.
US 10,382,054
App. No.
15/809,284
Granted
Aug 13, 2019
Kind
B2
Abstract

An analog front end (AFE) for an input device includes a current conveyor and an analog-to-digital converter (ADC) switchably coupled to the current conveyor. The current conveyor is configured to receive an input signal from a plurality of sensor electrodes. The ADC generates an output value corresponding to a digital representation of the input signal when the ADC is coupled to the current conveyor. Further, the ADC may selectively adjust the output value based at least in part on a state of the ADC when the ADC is decoupled from the current conveyor. In some implementations, the ADC may include a delta-sigma modulator configured to generate an additional sample when the ADC is decoupled from the current conveyor. The ADC may determine an amount of quantization error in the output value based on the additional sample, and adjust the output value when the quantization error exceeds a threshold amount.

Claims (51)

1. An analog front end (AFE) for an input device, comprising:

a current conveyor comprising an amplifier configured to receive an input signal from a plurality of sensor electrodes; and

an analog-to-digital converter (ADC) switchably coupled to the current conveyor, the ADC configured to:

generate an output value corresponding to a digital representation of the input signal when the ADC is coupled to the current conveyor; and

selectively adjust the output value based at least in part on a state of the ADC when the ADC is decoupled from the current conveyor, wherein the input signal is not provided to the ADC when the ADC is decoupled from the current conveyor.

2. The AFE of claim 1 , further comprising switching circuitry configured to:

couple the ADC to the current conveyor during a sampling interval; and

decouple the ADC from the current conveyor upon termination of the sampling interval.

3. The AFE of claim 2 , wherein the sampling interval coincides with a low power mode of the AFE.

4. The AFE of claim 1 , wherein the ADC includes:

a delta-sigma modulator configured to generate a series of samples based at least in part on the received input signal; and

a decimation filter configured to convert the series of samples to the output value when the ADC is coupled to the current conveyor.

5. The AFE of claim 4 , wherein the delta-sigma modulator is further configured to generate an additional sample when the ADC is decoupled from the current conveyor.

6. The AFE of claim 5 , wherein the ADC is configured to selectively adjust the output value by:

determining an amount of quantization error in the output value based on the additional sample; and

adjusting the output value when the amount of quantization error exceeds a threshold amount.

7. The AFE of claim 6 , wherein the decimation filter comprises an up-down counter, and wherein the ADC is further configured to selectively adjust the output value by:

incrementing the output value when the amount of quantization error exceeds the threshold amount; and

maintaining the output value when the amount of quantization error does not exceed the threshold amount.

8. The AFE of claim 4 , wherein the delta-sigma modulator includes an integrator and a feedback digital-to-analog converter (DAC), and wherein the ADC is further configured to decouple the feedback DAC from the integrator prior to generating a first sample in the series of samples.

9. The AFE of claim 8 , wherein the ADC is configured to couple the feedback DAC to the integrator a threshold period after receiving the input signal from the current conveyor.

10. The AFE of claim 9 , wherein the threshold period is based at least in part on a sampling frequency of the delta-sigma modulator and a return-to-zero time of a clock signal used to control the sampling frequency.

11. A method of operating an analog front end (AFE) switchably coupled to a plurality of sensor electrodes, the method comprising:

receiving an input signal from the plurality of sensor electrodes;

generating an output value corresponding to a digital representation of the input signal when the AFE is coupled to the plurality of sensor electrodes, the output value being generated by an analog-to-digital converter (ADC); and

selectively adjusting the output value based at least in part on a state of the AFE when the AFE is decoupled from the plurality of sensor electrodes, wherein the input signal is not provided to the ADC when the AFE is decoupled from the plurality of sensor electrodes.

12. The method of claim 11 , further comprising:

coupling the AFE to the plurality of sensor electrodes during a sampling interval; and

decoupling the AFE from the plurality of sensor electrodes upon termination of the sampling interval.

13. The method of claim 12 , wherein the sampling interval coincides with a low power mode of the AFE.

14. The method of claim 11 , further comprising:

generating a series of samples based at least in part on the received input signal; and

converting the series of samples to the output value when the AFE is coupled to the plurality of sensor electrodes.

15. The method of claim 14 , wherein the selectively adjusting comprises:

generating an additional sample when the AFE is decoupled from the plurality of sensor electrodes;

determining an amount of quantization error in the output value based on the additional sample; and

adjusting the output value when the amount of quantization error exceeds a threshold amount.

16. The method of claim 15 , wherein the selectively adjusting further comprises:

incrementing the output value when the amount of quantization error exceeds the threshold amount; and

maintaining the output value when the amount of quantization error does not exceed the threshold amount.

17. The method of claim 14 , wherein the AFE includes a delta-sigma modulator, the method further comprising:

decoupling a feedback digital-to-analog converter (DAC) of the delta-sigma modulator from an integrator of the delta-sigma modulator prior to generating a first sample in the series of samples.

18. The method of claim 17 , further comprising:

coupling the feedback DAC to the integrator a threshold period after receiving the input signal from the plurality of sensor electrodes.

19. The method of claim 18 , wherein the threshold period is based at least in part on a sampling frequency of the delta-sigma modulator and a return-to-zero time of a clock signal used to control the sampling frequency.

20. An input device, comprising:

a plurality of sensor electrodes; and

an analog front end (AFE) switchably coupled to the plurality of sensor electrodes, the AFE configured to:

receive an input signal from the plurality of sensor electrodes;

generate an output value corresponding to a digital representation of the input signal when the AFE is coupled to the plurality of sensor electrodes, the output value being generated by an analog-to-digital converter (ADC); and

selectively adjust the output value based at least in part on a state of the AFE when the AFE is decoupled from the plurality of sensor electrodes, wherein the input signal is not provided to the ADC when the AFE is decoupled from the plurality of sensor electrodes.

Assignments (2)
SECURITY INTEREST Recorded Feb 14, 2020
From: SYNAPTICS INCORPORATED
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 051936/0103 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2017
From: BOHANNON, ERIC SCOTT
To: SYNAPTICS INCORPORATED
Reel/Frame 044091/0118 →
Cited By (1)
US 12,399,202