IP Library Granted Patent US 10,439,658
Granted Patent B2
US 10,439,658 · App. 15/811,869 · Granted Oct 8, 2019

Apparatus and a method for amplifying an input signal

Inventors: Christian Kranz (Ratingen, DE); Stephan Henzler (Munich, DE)
Assignee: Intel IP Corporation
H04B1/04H03F1/083H03F1/34H03F3/19H03F3/2173H03F3/45475H03F2200/129H03F2200/451H03F2200/91H03F2203/45116H03F2203/45528H03F2203/45702H04B2001/0408
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Quick Facts
Patent No.
US 10,439,658
App. No.
15/811,869
Granted
Oct 8, 2019
Kind
B2
Abstract

An apparatus for amplifying an input signal is provided. The apparatus includes an output stage to generate an output signal. The apparatus further includes a compensation signal generator configured to generate a compensation signal based on at least one of a voltage value of the input signal or a voltage value of the output signal. The apparatus further includes a combiner configured to generate a control signal for the output stage based on a target signal, the compensation signal and a signal related to a current value of the output stage. The target signal corresponds to a desired output signal. The output stage is configured to generate the output signal using the control signal.

Claims (46)

1. An apparatus for amplifying an input signal, comprising:

an output stage configured to generate an output signal;

a compensation signal generator configured to generate a compensation signal based on at least one of a voltage value of the input signal or a voltage value of the output signal; and

a combiner configured to generate a control signal for the output stage based on a target signal corresponding to a desired output signal, the compensation signal and a signal related to a current value of the output stage,

wherein the output stage is configured to generate the output signal using the control signal.

2. The apparatus of claim 1 , wherein the compensation signal generator is configured to generate multiple compensation signals within a working cycle of the apparatus.

3. The apparatus of claim 1 , wherein the compensation signal generator is configured to generate a single compensation signal for a working cycle of the apparatus.

4. The apparatus of claim 1 , wherein the compensation signal generator is configured to adjust an amplitude of the compensation signal based on at least one of the voltage value of the input signal and the voltage value of the output signal.

5. The apparatus of claim 1 , wherein the compensation signal generator is configured to generate the compensation signal with a triangular signal shape.

6. The apparatus of claim 1 , wherein the compensation signal generator is configured to generate the compensation signal to depend linearly on at least one of the voltage value of the input signal or the voltage value of the output signal.

7. The apparatus of claim 1 , wherein the compensation signal generator is configured to generate the compensation signal according to an operation which is mathematically correspondent to

S comp =k 1 +k 2 *,

with S comp denoting the compensation signal, k 1 and k 2 denoting constants, V s denoting a supply voltage of the apparatus and V i/o denoting the voltage value of the input signal, the voltage value of the output signal or a combination thereof.

8. The apparatus of claim 1 , wherein the compensation signal generator is configured to generate the compensation signal wherein a gain of the output signal compared to the input signal is independent of a power of the output signal.

9. The apparatus of claim 1 , wherein the compensation signal generator comprises:

a difference amplifier configured to generate a voltage difference signal by modifying a difference between a supply voltage of the apparatus and at least one of the voltage value of the input signal and the voltage value of the output signal by a gain factor, and to supply the voltage difference signal to a first node, the first node being coupled to a first potential;

a capacitive element comprising a first electrode coupled to an output node of the compensation signal generator and a second electrode coupled to a second potential; and

a voltage-to-current converter comprising an input coupled to the first node and an output coupled to the output node, wherein the voltage-to-current converter is configured to charge the first electrode based on a voltage provided by the first node,

wherein the compensation signal generator is configured to short-cut the output node and the second electrode of the capacitive element.

10. The apparatus of claim 1 , wherein the output stage comprises an inductor-capacitor network and a capacitive element.

11. The apparatus of claim 1 , wherein the output stage is based on a switching-mode power supply.

12. A transmitter comprising an apparatus for amplifying an input signal, the apparatus comprising:

an output stage configured to generate an output signal;

a compensation signal generator configured to generate a compensation signal based on at least one of a voltage value of the input signal or a voltage value of the output signal; and

a combiner configured to generate a control signal for the output stage based on a target signal corresponding to a desired output signal, the compensation signal and a signal related to a current value of the output stage,

wherein the output stage is configured to generate the output signal using the control signal.

13. The transmitter of claim 12 , wherein the input signal is based on a radio frequency transmit signal.

14. A method for amplifying an input signal to provide an output signal via an output stage, comprising:

generating a compensation signal based on at least one of a voltage value of the input signal or a voltage value of the output signal;

generating a control signal for the output stage based on a target signal, the compensation signal and a signal related to a current value of the output stage; and

generating the output signal using the control signal,

wherein the target signal corresponds to a desired output signal.

15. The method of claim 14 , wherein multiple compensation signals are generated within a working cycle of the method.

16. The method of claim 15 , wherein a single compensation signal is generated for a working cycle of the method.

17. The method of claim 14 , wherein generating the compensation signal comprises adjusting an amplitude of the compensation signal based on at least one of the voltage value of the input signal and the voltage value of the output signal.

18. The method of claim 14 , wherein generating the compensation signal comprises generating the compensation signal with a triangular signal shape.

19. The method of claim 14 , wherein generating the compensation signal comprises generating the compensation signal to depend linearly on at least one of the voltage value of the input signal or the voltage value of the output signal.

20. The method of claim 14 , wherein generating the compensation signal comprises generating the compensation signal according to an operation which is mathematically correspondent to

S comp =k 1 +k 2 *,

with S comp denoting the compensation signal, k 1 and k 2 denoting constants, V s denoting a supply voltage of the output stage and V i/o denoting the voltage value of the input signal, the voltage value of the output signal or a combination thereof.

21. The method of claim 14 , wherein generating the compensation signal comprises generating the compensation signal wherein a gain of the output signal compared to the input signal is independent from a power of the output signal.

22. A computer readable storage medium having stored thereon a program having a program code for performing, when the program is executed on a computer or processor, a method for amplifying an input signal to provide an output signal via an output stage, the method comprising:

generating a compensation signal based on at least one of a voltage value of the input signal or a voltage value of the output signal;

generating a control signal for the output stage based on a target signal, the compensation signal and a signal related to a current value of the output stage; and

generating the output signal using the control signal,

wherein the target signal corresponds to a desired output signal.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 8, 2021
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 056524/0373 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 21, 2017
From: KRANZ, CHRISTIAN; HENZLER, STEPHAN
To: INTEL IP CORPORATION
Reel/Frame 044187/0125 →