IP Library Granted Patent US 10,555,398
Granted Patent B2
US 10,555,398 · App. 15/827,015 · Granted Feb 4, 2020

System and driving method for light emitting device display

Inventors: Arokia Nathan (Cambridge, GB); Gholamreza Chaji (Waterloo, CA); Stefan Alexander (Waterloo, CA)
Assignee: Ignis Innovation Inc.
H05B33/0896G09G3/3233G09G3/3241G09G3/3258G09G3/3283G09G3/3291H05B33/083G09G2300/043G09G2300/0819G09G2300/0852G09G2300/0861G09G2310/0262G09G2320/0252G09G2320/043G09G2320/045
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Quick Facts
Patent No.
US 10,555,398
App. No.
15/827,015
Granted
Feb 4, 2020
Kind
B2
Abstract

A light emitting device display, its pixel circuit and its driving technique is provided. The pixel includes a light emitting device and a plurality of transistors. A bias current and programming voltage data are provided to the pixel circuit in accordance with a driving scheme so that the current through the driving transistor to the light emitting device is adjusted.

Claims (19)

1. A display system comprising:

a pixel array having a plurality of pixel circuits, each of the plurality of pixel circuits being configured to be operated in a programming cycle, during which each pixel circuit receives a programming voltage according to display data, and operated in a driving cycle different from the programming cycle, during which each pixel emits light according to the programming voltage, each pixel circuit comprising:

a light emitting device;

a capacitor having a first and a second terminal, the first terminal of the capacitor coupled to a signal line;

a first switch transistor having a gate terminal, a first terminal, and a second terminal, the gate terminal of the first switch transistor coupled to a select line, the first terminal of the first switch transistor coupled to the second terminal of the capacitor, the second terminal of the first switch transistor coupled to the light emitting device;

a second switch transistor having a gate terminal, a first terminal, and a second terminal, the gate terminal of the second switch transistor coupled to a select line, the first terminal of the second switch transistor coupled to the light-emitting device, the second terminal of the second switch transistor coupled to a bias line; and

a driving transistor for driving the light emitting device, the driving transistor having a gate coupled to the second terminal of the capacitor; and

driver circuitry for programming the pixel circuit during the programming cycle and driving the pixel circuit during a driving cycle, the driver circuitry providing programming voltages on the signal line as a function of the display data for the pixel circuit, and providing a controllable bias current, independent of programming data for the pixel circuit, on the bias line to compensate for spatial and temporal non-uniformities of the pixel circuits.

2. The display system according to claim 1 , wherein for each pixel circuit, the gate terminal of the first switch transistor and the gate terminal of the second switch transistor are operated by a single select line.

3. The display system according to claim 1 , wherein for each pixel circuit, the second switch transistor includes a first terminal coupled to the bias line and a second terminal coupled to a connection node between the light emitting device and the driving transistor.

4. The display system according to claim 1 , wherein the display data includes a plurality of voltage signals for dividing current in different current levels for different grey scales.

5. The display system according to claim 1 , wherein each light emitting device includes an organic light emitting diode.

6. The display system according to claim 1 , wherein at least one of the transistors of each pixel circuit is a thin film transistor.

7. The display system according to claim 1 , wherein each transistor is implemented using poly silicon, nano/micro (crystalline) silicon, amorphous silicon, CMOS, organic semiconductor, metal organic technologies, or a combination thereof.

8. The display system according to claim 1 , wherein the pixel array includes an active matrix array.

9. The display system according to claim 1 , wherein the controllable bias current is a predetermined fixed current.

10. The display system of claim 1 , further comprising a controllable current source for providing said controllable bias current, wherein the controllable current source comprises a calibrated current mirror for operating on the bias line based on a reference current.

11. The display system of claim 1 , further comprising a controllable current source for providing said controllable bias current, wherein the controllable current source comprises a voltage to current converter for converting voltage to the bias current.

12. The display system of claim 1 , further comprising a controllable current source for providing said controllable bias current, wherein the controllable current source is calibrated via a data stored in a memory.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 19, 2023
From: IGNIS INNOVATION INC.
To: IGNIS INNOVATION INC.
Reel/Frame 063706/0406 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 30, 2017
From: NATHAN, AROKIA; CHAJI, GHOLAMREZA; ALEXANDER, STEFAN
To: IGNIS INNOVATION INC.
Reel/Frame 044259/0447 →
Continuity (5)
Continuation 14466084 · Aug 22, 2014
Continuation 14094175 · Dec 2, 2013
Continuation 12425734 · Apr 17, 2009
Provisional Application 61046256 · Apr 18, 2008
Related Publication 20180084621A1 · Mar 22, 2018
Cited By (1)
US 12,387,680