IP Library Granted Patent US 10,584,027
Granted Patent B2
US 10,584,027 · App. 15/829,314 · Granted Mar 10, 2020

Method for forming hermetic seals in MEMS devices

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Quick Facts
Patent No.
US 10,584,027
App. No.
15/829,314
Granted
Mar 10, 2020
Kind
B2
Abstract

A method of processing a double sided wafer of a microelectromechanical device includes spinning a resist onto a first side of a first wafer. The method further includes forming pathways within the resist to expose portions of the first side of the first wafer. The method also includes etching one or more depressions in the first side of the first wafer through the pathways, where each of the depressions have a planar surface and edges. Furthermore, the method includes depositing one or more adhesion metals over the resist such that the one or more adhesion metals are deposited within the depressions, and then removing the resist from the first wafer. The method finally includes depositing indium onto the adhesion metals deposited within the depressions and bonding a second wafer to the first wafer by compressing the indium between the second wafer and the first wafer.

Claims (37)

1. A method for forming a low temperature bond between wafers, the method comprising:

spinning a resist onto a first side of a first wafer;

forming one or more pathways within the resist to expose portions of the first side of the first wafer;

etching the first side of the first wafer through the one or more pathways to form one or more depressions that align with the pathways, each of the one or more depressions having a planar surface and edges;

depositing one or more adhesion metals over the resist such that the one or more adhesion metals is deposited within each of the one or more depressions;

removing the resist;

depositing indium onto the one or more adhesion metals deposited within the one or more depressions such that the indium is spaced from the edges of the one or more depressions; and

compressing the indium between a second wafer and the first side of the first wafer to form a bond between the second wafer and the first wafer.

2. The method of claim 1 , wherein the one or more depressions are concentric to the first wafer.

3. The method of claim 1 , wherein each of the one or more depressions extend continuously around a peripheral region of the first side of the first wafer.

4. The method of claim 1 , wherein the one or more adhesion metals comprise:

a first adhesion metal of titanium; and

a second adhesion metal of gold.

5. The method of claim 1 , wherein the edges of the one or more depressions form shear points for the indium when the indium is compressed.

6. The method of claim 1 , further comprising, prior to depositing the indium:

bonding a third wafer to a second surface of the first wafer.

7. The method of claim 6 , wherein the bond between the second wafer and the first side of the first wafer is a hermetic bond, and the bonding of the third wafer with the first wafer is formed by using an applied force to the first wafer and the third wafer.

8. The method of claim 6 , wherein the second and third wafers are silicon wafers.

9. The method of claim 1 , wherein the first wafer is a glass wafer.

10. The method of claim 1 , wherein the one or more depressions are etched into the first side of the first wafer via isotropic etching.

11. A method for forming a low temperature bond between wafers, the method comprising:

spinning a resist onto a peripheral region of a first side of a first wafer;

forming one or more pathways into the resist;

etching one or more depressions into the first side of the first wafer through the one or more pathways, each of the one or more depressions having edges;

depositing one or more adhesion metals into the one or more depressions;

bonding a second wafer to a second side of the first wafer by using an applied force to the first wafer and the second wafer;

depositing indium within the depressions and onto the adhesion metals deposited within the one or more depressions such that the indium extends out from the one or more depressions and is spaced from the edges of the one or more depressions; and

bonding a third wafer to the first side of the first wafer by compressing the indium between the third wafer and the first side of the first wafer.

12. The method of claim 11 , wherein each of the one or more depressions have a first depth, the adhesive metals have a first height, and the first depth is greater than the first height.

13. The method of claim 11 , wherein the third wafer is bonded to the first wafer via a hermetic bond.

14. The method of claim 13 , wherein the second and third wafers are silicon wafers, and the first wafer is a glass wafer.

15. The method of claim 11 , wherein the one or more depressions extend continuously around the peripheral region of the first wafer.

16. The method of claim 11 , wherein the peripheral region of the first side of the first wafer surrounds a central region of the first side of the first wafer.

17. The method of claim 16 , wherein the one or more depressions are disposed within the peripheral region.

18. The method of claim 17 , wherein the one or more depressions extend continuously around the peripheral region of the first wafer.

19. The method of claim 17 , wherein compression of the indium between the first wafer and the third wafer causes the edges of the one or more depressions to form shear points for the indium.

20. The method of claim 11 , wherein the one or more depressions are concentric to the first wafer.

Assignments (6)
SECURITY INTEREST Recorded Feb 21, 2024
From: ELBIT SYSTEMS OF AMERICA, LLC; SPARTON CORPORATION; SPARTON DELEON SPRINGS, LLC; LOGOS TECHNOLOGIES LLC; ELBITAMERICA, INC.; KMC SYSTEMS, INC.
To: CAPITAL ONE, NATIONAL ASSOCIATION, AS AGENT
Reel/Frame 066642/0935 →
RELEASE OF SECURITY INTEREST Recorded Feb 21, 2024
From: WELLS FARGO BANK, NATIONAL ASSOCIATION
To: ELBIT SYSTEMS OF AMERICA, LLC
Reel/Frame 066644/0612 →
CHANGE OF NAME Recorded Sep 17, 2019
From: HARRIS CORPORATION
To: L3HARRIS TECHNOLOGIES, INC.
Reel/Frame 050409/0288 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 13, 2019
From: L3HARRIS TECHNOLOGIES, INC.; EAGLE TECHNOLOGY, LLC
To: ELBIT SYSTEMS OF AMERICA, LLC
Reel/Frame 050375/0008 →
SECURITY INTEREST Recorded Sep 13, 2019
From: ELBIT SYSTEMS OF AMERICA, LLC
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 050375/0425 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 1, 2017
From: SMITH, ARLYNN W.; CHILCOTT, DAN
To: EAGLE TECHNOLOGY, LLC
Reel/Frame 044278/0332 →