IP Library Granted Patent US 10,853,264
Granted Patent B2
US 10,853,264 · App. 15/833,874 · Granted Dec 1, 2020

Virtual memory system

Inventors: Shekar Babu Suryanarayana (Karnataka, IN); Sumanth Vidyadhara (Karnataka, IN); Parmeshwr Prasad (Karnataka, IN)
Assignee: Dell Products L.P.
G06F12/1036G06F12/0238G06F12/1009G06F2212/202G06F2212/65
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Quick Facts
Patent No.
US 10,853,264
App. No.
15/833,874
Granted
Dec 1, 2020
Kind
B2
Abstract

A virtual memory system includes a virtual memory engine coupled to a plurality of physical memory devices and a virtual memory database. During an initialization process, virtual memory engine uses a first unique global identifier to create virtual memory in the virtual memory database by mapping a continuous virtual memory address range to non-continuous physical memory device address ranges that are provided across the plurality of physical memory devices. During the initialization process, or subsequently during runtime, the virtual memory engine uses a second global unique identifier to define a virtual memory device namespace in the virtual memory that includes a first continuous subset of the continuous virtual member address range. During runtime, the virtual memory engine then provides read and write block mode access to the plurality of physical memory devices via the virtual memory device namespace defined in the virtual memory database.

Claims (45)

1. A virtual memory system, comprising:

a plurality of physical memory devices;

a virtual memory database; and

a virtual memory engine that is coupled to each of the plurality of physical memory devices and the virtual memory database, and that includes a Basic Input Output System (BIOS) and a runtime service, wherein the virtual memory engine is configured to:

create, during an initialization process and in the virtual memory database using a first global unique identifier, virtual memory by mapping a continuous virtual memory address range to interleaved physical memory device address ranges that are provided across the plurality of physical memory devices;

define, in the virtual memory database using a second global unique identifier, a virtual memory device namespace in the virtual memory that includes a first continuous subset of the continuous virtual member address range, wherein the BIOS is configured to define the virtual memory namespace identifier during the initialization process and in the virtual memory database using the second global unique identifier, and wherein the runtime service is configured to define the virtual memory namespace subsequent to the initialization process and during runtime in the virtual memory database using the second global unique identifier; and

provide, during runtime, read and write block mode access to the plurality of physical memory devices via the virtual memory device namespace defined in the virtual memory database.

2. The virtual memory system of claim 1 , wherein the plurality of virtual memory devices are Non-Volatile Virtual Memory Modules (NVDIMMs) and the virtual memory is a virtual NVDIMM.

3. The virtual memory system of claim 2 , wherein the virtual memory database includes an NVDIMM Firmware Interface Table (NFIT).

4. The virtual memory system of claim 1 , wherein the virtual memory engine is configured to:

determine that a first physical memory device of the plurality of physical memory devices has been replaced with a second physical memory device; and

replace, in the virtual memory database and in response to determining that the first physical memory device has been replaced with the second physical memory device, a first physical memory device address range that is provided in the first physical memory device, included in interleaved physical memory device address ranges, and mapped to the continuous virtual memory address range, with a second physical memory device address range provided in the second physical memory device.

5. The virtual memory system of claim 4 , wherein the virtual memory engine is configured to:

provide, during runtime and as a result of replacing the first physical memory address range with second physical memory address range, read and write block mode access to the second physical memory device via the virtual memory namespace.

6. The virtual memory system of claim 1 , wherein the virtual memory engine is configured to:

increase the size of the virtual memory device namespace in the virtual memory by redefining, in the virtual memory database using the second global unique identifier, the virtual memory device namespace to include the first continuous subset of the continuous virtual memory address range and a second continuous subset of the continuous virtual memory address range that is continuous with the first continuous subset.

7. An information handling system (IHS), comprising:

a processing system; and

a memory system that is coupled to the processing system and that includes instructions that, when executed by the processing system, cause the processing system to provide a virtual memory engine that includes a Basic Input/Output System (BIOS) and a runtime service and that is configured to:

create, during an initialization process and in a virtual memory database using a first global unique identifier, virtual memory by mapping a continuous virtual memory address range to interleaved physical memory device address ranges that are provided across a plurality of physical memory devices;

define, in the virtual memory database using a second global unique identifier, a virtual memory device namespace in the virtual memory that includes a first continuous subset of the continuous virtual member address range, wherein the BIOS is configured to define the virtual memory namespace identifier during the initialization process and in the virtual memory database using the second global unique identifier, and wherein the runtime service is configured to define the virtual memory namespace subsequent to the initialization process and during runtime in the virtual memory database using the second global unique identifier; and

provide, during runtime, read and write block mode access to the plurality of physical memory devices via the virtual memory device namespace defined in the virtual memory database.

8. The IHS of claim 7 , wherein the plurality of virtual memory devices are Non-Volatile Virtual Memory Modules (NVDIMMs) and the virtual memory is a virtual NVDIMM.

9. The IHS of claim 8 , wherein the virtual memory database includes an NVDIMM Firmware Interface Table (NFIT).

10. The IHS of claim 7 , wherein the virtual memory engine is configured to:

determine that a first physical memory device of the plurality of physical memory devices has been replaced with a second physical memory device;

replace, in the virtual memory database and in response to determining that the first physical memory device has been replaced with the second physical memory device, a first physical memory device address range that is provided in the first physical memory device, included in the interleaved physical memory device address ranges, and mapped to the continuous virtual memory address range, with a second physical memory device address range provided in the second physical memory device; and

provide, during runtime and as a result of replacing the first physical memory address range with second physical memory address range, read and write block mode access to the second physical memory device via the virtual memory namespace.

11. The IHS of claim 7 , wherein the virtual memory engine is configured to:

increase the size of the virtual memory device namespace in the virtual memory by redefining, in the virtual memory database using the second global unique identifier, the virtual memory device namespace to include the first continuous subset of the continuous virtual memory address range and a second continuous subset of the continuous virtual memory address range that is continuous with the first continuous subset.

12. A method for providing virtual memory, comprising:

creating, by a computing device during an initialization process and in a virtual memory database using a first global unique identifier, virtual memory by mapping a continuous virtual memory address range to interleaved physical memory device address ranges that are provided across a plurality of physical memory devices;

defining, by the computing device in the virtual memory database using a second global unique identifier, a virtual memory device namespace in the virtual memory that includes a first continuous subset of the continuous virtual member address range, wherein the defining includes:

defining, by a Basic Input/Output System (BIOS) in the computing device during the initialization process, the virtual memory namespace in the virtual memory database using the second global unique identifier; and

defining, by a runtime service in the computing device subsequent to the initialization process and during runtime, the virtual memory namespace in the virtual memory database using the second global unique identifier; and

providing, by the computing device during runtime, read and write block mode access to the plurality of physical memory devices via the virtual memory device namespace defined in the virtual memory database.

13. The method of claim 12 , wherein the plurality of virtual memory devices are Non-Volatile Virtual Memory Modules (NVDIMMs) and the virtual memory is a virtual NVDIMM.

14. The method of claim 13 , wherein the virtual memory database includes an NVDIMM Firmware Interface Table (NFIT).

15. The method of claim 12 , further comprising:

determining, by the computing device, that a first physical memory device of the plurality of physical memory devices has been replaced with a second physical memory device; and

replacing, by the computing device in the virtual memory database and in response to determining that the first physical memory device has been replaced with the second physical memory device, a first physical memory device address range that is provided in the first physical memory device, included in the interleaved physical memory device address ranges, and mapped to the continuous virtual memory address range, with a second physical memory device address range provided in the second physical memory device.

16. The method of claim 15 , further comprising:

providing, by the computing device during runtime and as a result of replacing the first physical memory address range with second physical memory address range, read and write block mode access to the second physical memory device via the virtual memory namespace.

17. The method of claim 12 , further comprising:

increasing, by the computing device, the size of the virtual memory device namespace in the virtual memory by redefining, in the virtual memory database using the second global unique identifier, the virtual memory device namespace to include the first continuous subset of the continuous virtual memory address range and a second continuous subset of the continuous virtual memory address range that is continuous with the first continuous subset.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (045482/0131) Recorded May 20, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO WYSE TECHNOLOGY L.L.C.)
Reel/Frame 061749/0924 →
RELEASE OF SECURITY INTEREST AT REEL 045482 FRAME 0395 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; WYSE TECHNOLOGY L.L.C.
Reel/Frame 058298/0314 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Mar 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; WYSE TECHNOLOGY L.L.C.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 045482/0131 →
PATENT SECURITY AGREEMENT (CREDIT) Recorded Mar 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; WYSE TECHNOLOGY L.L.C.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 045482/0395 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 7, 2017
From: SURYANARAYANA, SHEKAR BABU; VIDYADHARA, SUMANTH; PRASAD, PARMESHWR
To: DELL PRODUCTS L.P.
Reel/Frame 044326/0072 →