Electronic device
An electronic device may include a semiconductor memory, and the semiconductor memory may include a free layer having a variable magnetization direction; a pinned layer having a pinned magnetization direction; and a tunnel barrier layer between the free layer and the pinned layer, wherein the free layer may include a first magnetic layer; a second magnetic layer having a smaller perpendicular magnetic anisotropy energy density than the first magnetic layer; and a spacer interposed between the first magnetic layer and the second magnetic layer.
1. An electronic device comprising a semiconductor memory, wherein the semiconductor memory includes:
a free layer having a variable magnetization direction;
a pinned layer having a pinned magnetization direction; and
a tunnel barrier layer between the free layer and the pinned layer,
wherein the free layer includes:
a first magnetic layer;
a second magnetic layer having a smaller perpendicular magnetic anisotropy energy density than the first magnetic layer; and
a spacer interposed between the first magnetic layer and the second magnetic layer.
2. The electronic device of claim 1 , wherein the free layer has a spacer exchange coupling constant equal to or less than 0.3.
3. The electronic device of claim 1 , wherein the second magnetic layer is disposed adjacent to the tunnel barrier layer and has a greater thickness than the first magnetic layer.
4. The electronic device of claim 1 , wherein the second magnetic layer includes an alloy including Co, Fe and B.
5. The electronic device of claim 1 , wherein the first magnetic layer has a crystalline structure including a hexagonal close packed (h p) (0001) structure or a face centered cubic (fcc) (111) structure, or an amorphous structure.
6. The electronic device of claim 1 , wherein the first magnetic layer includes a stack structure including Co/Pt Co/Pd, Co/Ir or Co/Ru, an alloy including Co, or a combination thereof.
7. The electronic device of claim 1 ,
wherein the spacer includes an amorphous material, a metal, a metal nitride, a metal oxide or a combination thereof, and
wherein a material and a thickness of the spacer are selected so as to satisfy a condition of a spacer exchange coupling constant≤0.3.
8. The electronic device of claim 1 , wherein the semiconductor memory further includes an under layer disposed below the free layer and improving perpendicular magnetic anisotropy of the free layer.
9. The electronic device of claim 8 , wherein the under layer includes a nitride or a carbide having a wurzite structure.
10. The electronic device of claim 8 , wherein the under layer includes AIN.
11. An electronic device comprising a semiconductor memory, wherein the semiconductor memory includes:
a free layer having a variable magnetization direction;
a pinned layer having a pinned magnetization direction; and
a tunnel barrier layer interposed between the free layer and the pinned layer,
wherein the free layer includes:
a first magnetic layer;
a second magnetic layer; and
a spacer interposed between the first magnetic Payer and the second magnetic layer, and
wherein, at the time of magnetization reversal, the second magnetic layer first undergoes magnetization reversal and then the first magnetic layer undergoes magnetization reversal with the help of a stray field generated by the second magnetic layer.
12. The electronic device of claim 11 , wherein the free layer has a spacer exchange coupling constant equal to or less than 0 . 3 .
13. The electronic device of claim 11 , wherein the second magnetic layer is disposed adjacent to the tunnel barrier layer and has a greater thickness than the first magnetic layer.
14. The electronic device of claim 11 , wherein the second magnetic layer includes an alloy including Co, Fe and B.
15. The electronic device of claim 11 , wherein the first magnetic layer has a crystalline structure including a hexagonal close packed (hcp) (0001) structure or a face centered cubic (fcc) (111) structure, or an amorphous structure.
16. The electronic device of claim 11 , wherein the first magnetic layer includes a stack structure including Co/Pt, Co/Pd, Co/Ir or Co/Ru, an alloy including Co, or a combination thereof.
17. The electronic device of claim 11 ,
wherein the spacer includes an amorphous material, a metal, a metal nitride, a metal oxide or a combination thereof, and
wherein a material and a thickness of the spacer are selected so as to satisfy a condition of a spacer exchange coupling constant≤0.3.
18. The electronic device of claim 11 , wherein the semiconductor memory further includes an under layer disposed below the free layer and improving perpendicular magnetic anisotropy of the free layer.
19. The electronic device of claim 18 , wherein the under layer includes a nitride or a carbide having a wurzite structure.
20. The electronic device of claim 18 wherein the under layer includes AlN.