IP Library Granted Patent US 10,340,341
Granted Patent B1
US 10,340,341 · App. 15/848,953 · Granted Jul 2, 2019

Self-limiting and confining epitaxial nucleation

Inventors: Robin Hsin Kuo Chao (Cohoes, NY); Kangguo Cheng (Schenectady, NY); Nicolas Loubet (Guilderland, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
H01L29/0673H01L21/0217H01L21/02636H01L21/30604H01L21/31116H01L29/0649H01L29/0847H01L29/41791H01L29/42392H01L29/6653H01L29/66636H01L29/66742H01L29/66795H01L29/785H01L29/786H01L29/66545
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Quick Facts
Patent No.
US 10,340,341
App. No.
15/848,953
Granted
Jul 2, 2019
Kind
B1
Abstract

A method of fabricating a semiconductor device includes forming a fin in a substrate and depositing a spacer material on the fin. The method includes recessing the spacer material so that a surface of the fin is exposed. The method includes removing a portion of the fin within lateral sidewalls of the spacer material to form a recess, leaving a portion of the fin on the lateral sidewalls. The method further includes depositing a semiconductor material within the recess.

Claims (14)

1. A method of fabricating a semiconductor device, the method comprising:

forming a fin in a substrate, the fin comprising a first semiconductor material;

depositing a spacer material on the fin;

recessing the spacer material so that a surface of the fin is exposed;

removing a portion of the fin within lateral sidewalls of the spacer material to form a recess, leaving a portion of the first semiconductor material of the fin on the lateral sidewalls; and

depositing a second semiconductor material within the recess.

2. The method of claim 1 , wherein the spacer material comprises a dielectric material.

3. The method of claim 1 , wherein the spacer material comprises a low-k material.

4. The method of claim 1 , wherein the spacer material comprises SiBN, SiCN, SiBCN, or any combination thereof.

5. The method of claim 1 , wherein the spacer material surrounds exposed areas of the fin.

6. The method of claim 1 , wherein recessing the spacer material comprises a reactive ion etch.

7. The method of claim 1 , wherein the recess comprises a tapered recess.

8. The method of claim 7 , wherein the tapered recess is arranged below a surface of isolation regions.

9. The method of claim 1 , wherein depositing the second semiconductor material comprises applying an epitaxial growth process.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 20, 2017
From: CHAO, ROBIN HSIN KUO; CHENG, KANGGUO; LOUBET, NICOLAS
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 044451/0713 →
Cited By (1)
US 12,414,332