Storage capacitor for use in an antenna aperture
A storage capacitor and method for using the same in an antenna aperture are described. In one embodiment, an antenna comprises a physical antenna aperture having first and second substrates forming an array of radio-frequency (RF) radiating antenna elements that are controlled and operable together to form a beam for the frequency band for use in holographic beam steering, wherein each of the antenna elements is coupled to a circuit to supply a voltage to the said each antenna element and a storage capacitor formed with a plurality of conductive layers (e.g., metal layers) on a first substrate, wherein top and bottom conductive layers of the plurality of conductive layers are at a first voltage that is equal to a second voltage on a conductive layer (e.g., a metal layer) of the second substrate to reduce parasitic capacitance produced between the storage capacitor and the conductive layer on the second substrate.
1. An antenna comprising:
a physical antenna aperture having a first substrate and a second substrate forming an array of radio-frequency (RF) radiating antenna elements that are controlled and operable together to form a beam for a frequency band for use in holographic beam steering, wherein each of the antenna elements is coupled to a circuit to supply a voltage to the said each antenna element and a storage capacitor formed with a plurality of conductive layers on the first substrate, wherein top and bottom conductive layers of the plurality of conductive layers are at a first voltage that is equal a second voltage on a conductive layer of the second substrate to reduce parasitic capacitance produced between the storage capacitor and the conductive layer on the second substrate in comparison to the storage capacitor being without the top conductive layer.
2. The antenna defined in claim 1 further comprising liquid crystal between the first and second substrates, and wherein the first and second substrates comprise a patch substrate and an iris substrate.
3. The antenna defined in claim 2 wherein the patch and iris substrates are glass substrates.
4. The antenna defined in claim 1 wherein the circuit comprises a transistor having a gate of the transistor formed from a first portion of a gate metal layer on the first substrate, the storage capacitor having a bottom plate formed from a second portion of the gate metal layer.
5. The antenna defined in claim 4 wherein the transistor comprises a thin film transistor (TFT).
6. The antenna defined in claim 4 wherein the storage capacitor structure comprises:
a first metal layer,
a first dielectric layer on top of the first metal layer,
a second metal layer on top of the first dielectric layer,
a second dielectric layer on top of the second metal layer, and
a third metal layer on top of the second dielectric layer, with the third metal layer being electrically coupled to the first metal layer.
7. The antenna defined in claim 6 wherein the third metal layer is electrically coupled to the first metal layer using a via.
8. The antenna defined in claim 7 wherein
the first metal layer is formed from part of a metal layer fabricated to form part of the gate of the transistor formed on the first substrate, and
the second metal layer is formed from part of a metal layer fabricated to form source and drain electrodes of the transistor formed on the first substrate.
9. The antenna defined in claim 1 wherein the array of antenna elements comprises a tunable slotted array of RF radiating antenna elements.
10. The antenna defined in claim 1 wherein the array of antenna elements comprises two or more antenna sub-arrays.
11. The antenna defined in claim 10 wherein most elements in each of the at least two antenna sub-arrays are interleaved with respect to each other.
12. The antenna defined in claim 10 wherein each of the at least two antenna sub-arrays comprise a slotted array and each slotted array comprises a plurality of slots and further wherein each slot is tuned to provide a desired scattering at a given frequency.
13. The antenna defined in claim 12 wherein each slotted array comprises:
a plurality of slots;
a plurality of patches, wherein each of the patches is co-located over and separated from a slot in the plurality of slots, forming a patch/slot pair, each patch/slot pair being turned off or on based on application of a voltage to the patch in the pair; and
a controller to apply a control pattern to control the patch/slot pairs to cause generation of a beam.
14. An antenna comprising:
a physical antenna aperture having a first substrate and a second substrate forming an array of radio-frequency (RF) radiating antenna elements that are controlled and operable together to form a beam for a frequency band for use in holographic beam steering, wherein the second substrate comprises a conductive layer, wherein each of the antenna elements is coupled to a circuit to supply a voltage to the said each antenna element and a storage capacitor formed on a first substrate, wherein the storage capacitor comprises
a first metal layer,
a first dielectric layer on top of the first metal layer,
a second metal layer on top of the first dielectric layer,
a second dielectric layer on top of the second metal layer, and
a third metal layer on top of the second dielectric layer, with the third metal layer being electrically coupled to the first metal layer, wherein the first and third metal layers are at a first voltage that is equal a second voltage on the conductive layer of the second substrate to reduce parasitic capacitance produced between the storage capacitor and the conductive layer on the second substrate in comparison to the storage capacitor being without the third metal layer.
15. The antenna defined in claim 14 wherein the third metal layer is electrically coupled to the first metal layer using a via.
16. The antenna defined in claim 14 wherein
the first metal layer is formed from part of a metal layer fabricated to form part of a gate of a transistor formed on the first substrate, and
the second metal layer is formed from part of a metal layer fabricated to form source and drain electrodes of the transistor formed on the first substrate.
17. The antenna defined in claim 16 wherein the transistor comprises a thin film transistor (TFT).
18. The antenna defined in claim 14 wherein the second substrate includes a fourth metal layer, and the first, third and fourth metal layers are at a first voltage.
19. An antenna comprising:
an iris substrate;
a patch substrate,
an array of radio-frequency (RF) radiating antenna elements formed with the patch and iris substrates, the array of RF radiating antenna elements controllable and operable together to form a beam for a frequency band for use in holographic beam steering, wherein the iris substrate comprises a conductive layer, wherein each of the antenna elements is coupled to a circuit to supply a voltage to the said each antenna element and a storage capacitor on the patch substrate, wherein the storage capacitor comprises
a first metal layer,
a first dielectric layer on top of the first metal layer,
a second metal layer on top of the first dielectric layer,
a second dielectric layer on top of the second metal layer, and
a third metal layer on top of the second dielectric layer, with the third metal layer being electrically coupled to the first metal layer, wherein the first and third metal layers are at a first voltage that is equal a second voltage on the conductive layer of the iris substrate to reduce parasitic capacitance produced between the storage capacitor and the conductive layer on the iris substrate in comparison to the storage capacitor being without the third metal layer.
20. The antenna defined in claim 19 wherein the third metal layer is electrically coupled to the first metal layer using a via.
21. The antenna defined in claim 19 wherein
the first metal layer is formed from part of a metal layer fabricated to form part of a gate of a transistor formed on the patch substrate, and
the second metal layer is formed from part of a metal layer fabricated to form source and drain electrodes of the transistor formed on the patch substrate.
22. The antenna defined in claim 21 wherein the transistor comprises a thin film transistor (TFT).
23. The antenna defined in claim 19 wherein the iris substrate includes a fourth metal layer, and the first, third and fourth metal layers are at a first voltage.