IP Library Granted Patent US 10,075,072
Granted Patent B2
US 10,075,072 · App. 15/855,417 · Granted Sep 11, 2018

Semiconductor apparatus, power supply apparatus, electronic device, and control method for power supply apparatus

Inventor: Toshikazu Kuwano (Fujimi-machi, JP)
Assignee: SEIKO EPSON CORPORATION
H02M3/156H02M1/08H02M1/36
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Quick Facts
Patent No.
US 10,075,072
App. No.
15/855,417
Granted
Sep 11, 2018
Kind
B2
Abstract

A semiconductor apparatus includes: a switch circuit connected between a first power supply terminal and an output terminal; a switching element connected between the output terminal and a second power supply terminal; and a control circuit that, when a predetermined period has elapsed since the entry of the switch circuit into an ON state in response to an enable signal, causes the switching element to start a switching operation to increase a power supply voltage supplied between the first power supply terminal and the second power supply terminal.

Claims (37)

1. A semiconductor apparatus, comprising:

a switch circuit connected between a first power supply terminal and an output terminal;

a switching element connected between the output terminal and a second power supply terminal; and

a control circuit that, when a predetermined period has elapsed since entry of the switch circuit into an ON state in response to an enable signal, causes the switching element to start a switching operation to increase a power supply voltage supplied between the first power supply terminal and the second power supply terminal.

2. The semiconductor apparatus according to claim 1 , wherein

the control circuit places the switch circuit in an OFF state and places a second switch circuit in an ON state when a first period has elapsed since the entry of the switch circuit into the ON state, the second switch circuit being connected between the other end of an inductor having one end connected to the output terminal and the first power supply terminal.

3. The semiconductor apparatus according to claim 2 , wherein

the control circuit causes the switching element to start the switching operation when a second period has elapsed since entry of the second switch circuit into the ON state.

4. The semiconductor apparatus according to claim 3 , wherein

the control circuit supplies a first driving signal to the switching element after the second period has elapsed since the entry of the second switch circuit into the ON state, the first driving signal having an ON duty cycle that monotonically increases with time.

5. The semiconductor apparatus according to claim 4 , wherein

the control circuit supplies a second driving signal to the switching element after a voltage of a voltage increasing node has exceeded a predetermined voltage, the second driving signal having undergone pulse-width modulation based on the voltage of the voltage increasing node.

6. The semiconductor apparatus according to claim 1 , wherein

the switch circuit includes a plurality of transistors that are connected in series to one another between the first power supply terminal and the output terminal.

7. The semiconductor apparatus according to claim 4 , further comprising

a clock signal generation circuit that generates a system clock signal, wherein

the control circuit generates the first driving signal based on the system clock signal.

8. The semiconductor apparatus according to claim 3 , further comprising

a clock signal generation circuit that generates a system clock signal, wherein

the control circuit sets the first period or the second period based on the system clock signal.

9. The semiconductor apparatus according to claim 3 , wherein

the control circuit sets the first period or the second period based on a voltage of a voltage increasing node.

10. A power supply apparatus, comprising:

the semiconductor apparatus according to claim 1 ;

an inductor having one end connected to the output terminal;

a diode connected between the output terminal and a voltage increasing node; and

a capacitor connected between the voltage increasing node and the second power supply terminal.

11. The power supply apparatus according to claim 10 , further comprising

a second switch circuit connected between the first power supply terminal and the other end of the inductor.

12. An electronic device, comprising:

the power supply apparatus according to claim 10 ; and

a load to which an output voltage of the power supply apparatus is supplied.

13. A control method for a power supply apparatus that increases a power supply voltage supplied between a first power supply wire and a second power supply wire, the control method comprising:

(a) placing a first switch circuit connected to the first power supply wire in an ON state, and starting charging of a capacitor connected between one end of an inductor and the second power supply wire via a diode;

(b) placing a second switch circuit in an ON state when a first period has elapsed since entry of the first switch circuit into the ON state, the second switch circuit being connected between the first power supply wire and the other end of the inductor;

(c) generating a first driving signal based on a system clock signal and supplying the first driving signal to a switching element connected between the one end of the inductor and the second power supply wire after a second period has elapsed since entry of the second switch circuit into the ON state, the first driving signal having an ON duty cycle that monotonically increases with time; and

(d) supplying a second driving signal to the switching element after a voltage between both ends of the capacitor has exceeded a predetermined voltage, the second driving signal having undergone pulse-width modulation based on the voltage between the both ends of the capacitor.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 14, 2024
From: CRYSTAL LEAP ZRT
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 066761/0627 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 1, 2024
From: SEIKO EPSON CORPORATION
To: CRYSTAL LEAP ZRT
Reel/Frame 066162/0434 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ADDRESS OF THE ASSIGNEE PREVIOUSLY RECORDED ON REEL 044492 FRAME 0426. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jan 12, 2018
From: KUWANO, TOSHIKAZU
To: SEIKO EPSON CORPORATION
Reel/Frame 045054/0726 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2017
From: KUWANO, TOSHIKAZU
To: SEIKO EPSON CORPORATION
Reel/Frame 044492/0426 →
Priority Claims (1)
JP 2017-008210 · Jan 20, 2017 · national
Continuity (1)
Related Publication 20180212517A1 · Jul 26, 2018