CHEMICAL POLISHING OF SOLAR CELL SURFACES AND THE RESULTING STRUCTURES

1 . A method of fabricating a solar cell, the method comprising:

texturizing both first side and second side surfaces of a silicon substrate with a first hydroxide-based etch process;

reducing a surface roughness factor of the texturized second side surface of the silicon substrate with a second hydroxide-based etch process; and

subsequent to reducing the surface roughness factor of the texturized second side surface of the silicon substrate, forming emitter regions on the second side surface of the silicon substrate.

2 . The method of claim 1 , wherein the second hydroxide-based etch process comprises exposing the texturized second side surface of the silicon substrate to an aqueous solution of between 5-45 weight percent potassium hydroxide at a temperature between 50-90 degrees Celsius for a during between 1-30 minutes.

3 . The method of claim 1 , wherein the second hydroxide-based etch process comprises exposing the texturized second side surface of the silicon substrate to an aqueous solution of between 3-45 weight percent sodium hydroxide at a temperature between 50-90 degrees Celsius for a during between 1-30 minutes.

4 . The method of claim 1 , wherein the first hydroxide-based etch process is a first potassium hydroxide-based etch process, and the second hydroxide-based etch process is a second potassium hydroxide-based etch process.

5 . The method of claim 1 , wherein the second hydroxide-based etch process is applied to the texturized second side surface of the silicon substrate using a spray tool, rollers, or a single-sided etch bath.

6 . The method of claim 5 , wherein the first hydroxide-based etch process is applied to the silicon substrate in a chemical bath.

7 . The method of claim 1 , wherein reducing the surface roughness factor of the texturized second side surface of the silicon substrate comprises reducing an average surface roughness (Ra) from between 475-525 nanometers to between 175-225 nanometers.

8 . The method of claim 1 , wherein reducing the surface roughness factor of the texturized second side surface of the silicon substrate comprises reducing a peak surface roughness (Rp) from between 1600-1700 nanometers to between 400-550 nanometers.

9 . The method of claim 1 , wherein the first side surface is a front side surface and the second side surface is a back side surface.

10 . A solar cell, comprising:

a substrate having a light-receiving surface and a back side surface; and

a plurality of alternating N-type and P-type emitter regions in or above a portion of the back side surface of the substrate, wherein the portion of the back side surface of the substrate has a non-zero surface roughness factor less than a surface roughness factor of the light-receiving surface of the substrate.

11 . The solar cell of claim 10 , wherein the surface roughness factor of the light-receiving surface of the substrate is an average surface roughness (Ra) between 475-525, and wherein the non-zero surface roughness factor of the portion of the back side surface of the substrate is an average surface roughness (Ra) between 175-225 nanometers.

12 . The solar cell of claim 10 , wherein the surface roughness factor of the light-receiving surface of the substrate is a peak surface roughness (Rp) between 1600-1700 nanometers, and wherein the non-zero surface roughness factor of the portion of the back side surface of the substrate is a peak surface roughness (Rp) between 400-550 nanometers.

13 . The solar cell of claim 10 , wherein the substrate is a monocrystalline silicon substrate.

14 . The solar cell of claim 10 , wherein the plurality of alternating N-type and P-type emitter regions is in the portion of the back side surface of the substrate.

15 . The solar cell of claim 10 , wherein the plurality of alternating N-type and P-type emitter regions is on a dielectric layer on the portion of the back side surface of the substrate.

16 . A solar cell, comprising:

a substrate having a light-receiving surface and a back side surface;

a first polycrystalline silicon emitter region of a first conductivity type disposed on a first thin dielectric layer disposed on a portion of the back side surface of the substrate, wherein the portion of the back side surface of the substrate has a non-zero surface roughness factor less than a surface roughness factor of the light-receiving surface of the substrate; and

a second polycrystalline silicon emitter region of a second, different, conductivity type disposed on a second thin dielectric layer disposed in a trench in the back side surface of the substrate, wherein a portion of the second polycrystalline silicon emitter region overlaps a portion of the first polycrystalline silicon emitter region.

17 . The solar cell of claim 16 , wherein the surface roughness factor of the light-receiving surface of the substrate is an average surface roughness (Ra) between 475-525, and wherein the non-zero surface roughness factor of the portion of the back side surface of the substrate is an average surface roughness (Ra) between 175-225 nanometers.

18 . The solar cell of claim 16 , wherein the surface roughness factor of the light-receiving surface of the substrate is a peak surface roughness (Rp) between 1600-1700 nanometers, and wherein the non-zero surface roughness factor of the portion of the back side surface of the substrate is a peak surface roughness (Rp) between 400-550 nanometers.

19 . The solar cell of claim 16 , wherein the substrate is a monocrystalline silicon substrate.

20 . The solar cell of claim 16 , wherein the first conductivity type is P-type, and the second conductivity type is N-type.