IP Library Granted Patent US 10,331,557
Granted Patent B1
US 10,331,557 · App. 15/859,174 · Granted Jun 25, 2019

Distribution of memory address resources to bus devices in a multi-processor computing system

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Quick Facts
Patent No.
US 10,331,557
App. No.
15/859,174
Granted
Jun 25, 2019
Kind
B1
Abstract

A firmware attempts to allocate memory address resources, such as memory addresses in a PCI I/O and a PCI memory address space, to bus devices in a multi-processor computing system. If an out-of-resource (OOR) condition occurs during allocation of the memory address resources, memory address resources can be re-allocated from stacks that were successfully allocated requested resources to stacks that were not successfully allocated requested resources. Memory address resources can also, or alternately, be re-allocated from sockets that were successfully allocated requested resources to sockets that were not successfully allocated requested resources. If stack-level or socket-level readjustment of the memory address resource allocation fails, a base memory address of a configuration memory address space can be lowered, and the allocation can be retried. A pre-defined memory address resource allocation table can also be utilized to allocate the memory address resources following failure of the stack-level and socket-level allocation readjustment.

Claims (65)

1. A non-transitory computer-readable storage medium having computer-executable instructions stored thereupon which, when executed by a multi-processor computing system, cause the multi-processor computing system to:

detect an out-of-resource (OOR) condition when performing an allocation of memory address resources to bus devices in the multi-processor computing system;

responsive to detecting the OOR condition, determine whether a socket-level adjustment or a stack-level adjustment of the allocation of memory address resources to the bus devices is to be performed;

responsive to determining that a stack-level adjustment of the allocation of memory address resources is to be performed, perform a stack-level memory address resource allocation adjustment by

identifying memory address resources available from one or more stacks for which sufficient memory address resources were previously allocated, and

assigning the memory address resources available from the one or more stacks to one or more other stacks for which sufficient memory address resources were not previously allocated; and

responsive to determining that a socket-level adjustment of the allocation of memory address resources is to be performed, perform a socket-level memory address resource allocation adjustment by

identifying memory address resources available from one or more sockets for which sufficient memory address resources were previously allocated, and

assigning the memory address resources available from the one or more sockets to one or more other sockets for which sufficient memory address resources were not previously allocated.

2. The non-transitory computer-readable storage medium of claim 1 , wherein the OOR condition occurs when the one or more other stacks cannot be allocated memory address resources sufficient to satisfy memory address resource requirements of the one or more other stacks.

3. The non-transitory computer-readable storage medium of claim 1 , wherein the OOR condition occurs when the one or more other sockets cannot be allocated memory address resources sufficient to satisfy memory address resource requirements of the one or more other sockets.

4. The non-transitory computer-readable storage medium of claim 1 , wherein a stack comprises a collection of bus devices connected to a root bridge of the computer.

5. The non-transitory computer-readable storage medium of claim 1 , wherein the one or more sockets and the one or more other sockets correspond to processors in the computer.

6. The non-transitory computer-readable storage medium of claim 1 , having further computer-executable instructions stored thereupon which, when executed by the multi-processor computing system, cause the multi-processor computing system to

determine if the stack-level memory address resource allocation adjustment and the socket-level memory address resource allocation adjustment failed; and

responsive to determining that the stack-level memory address resource allocation adjustment and the socket-level memory address resource allocation adjustment failed,

assigning memory address resources to the one or more stacks, the one or more other stacks, the one or more sockets, and the one or more other sockets using a pre-defined memory address resource allocation table.

7. The non-transitory computer-readable storage medium of claim 1 , having further computer-executable instructions stored thereupon which, when executed by the multi-processor computing system, cause the multi-processor computing system to

determine if the stack-level memory address resource allocation adjustment and the socket-level memory address resource allocation adjustment failed; and

responsive to determining that the stack-level memory address resource allocation adjustment and the socket-level memory address resource allocation adjustment failed,

assigning memory address resources to the one or more stacks, the one or more other stacks, the one or more sockets, and the one or more other sockets following lowering of a memory address specifying the base memory address of a configuration memory address space.

8. A multi-processor computing system, comprising:

a plurality of central processing units (CPUs);

at least one bus having one or more bus devices connected thereto; and

a firmware device storing instructions which, when executed by at least one of the plurality of CPUs, will cause the multi-processor computing system to

detect an out-of-resource (OOR) condition when performing an allocation of memory address resources to the bus devices in the multi-processor computing system;

responsive to detecting the OOR condition, determine whether a socket-level adjustment or a stack-level adjustment of the allocation of memory address resources to the bus devices is to be performed;

responsive to determining that a stack-level adjustment of the allocation of memory address resources is to be performed, perform a stack-level memory address resource allocation adjustment by

identifying memory address resources available from one or more stacks for which sufficient memory address resources were previously allocated, and

assigning the memory address resources available from the one or more stacks to one or more other stacks for which sufficient memory address resources were not previously allocated; and

responsive to determining that a socket-level adjustment of the allocation of memory address resources is to be performed, perform a socket-level memory address resource allocation adjustment by

identifying memory address resources available from one or more sockets for which sufficient memory address resources were previously allocated, and

assigning the memory address resources available from the one or more sockets to one or more other sockets for which sufficient memory address resources were not previously allocated.

9. The multi-processor computing system of claim 8 , wherein the OOR condition occurs when the one or more other stacks cannot be allocated memory address resources sufficient to satisfy memory address resource requirements of the one or more other stacks.

10. The multi-processor computing system of claim 8 , wherein the OOR condition occurs when the one or more other sockets cannot be allocated memory address resources sufficient to satisfy memory address resource requirements of the one or more other sockets.

11. The multi-processor computing system of claim 8 , wherein a stack comprises a collection of bus devices connected to a root bridge of the computer.

12. The multi-processor computing system of claim 8 , wherein the one or more sockets and the one or more other sockets correspond to the CPUs.

13. The multi-processor computing system of claim 8 , wherein the firmware device stores further instructions to:

determine if the stack-level memory address resource allocation adjustment and the socket-level memory address resource allocation adjustment failed; and

responsive to determining that the stack-level memory address resource allocation adjustment and the socket-level memory address resource allocation adjustment failed,

assigning memory address resources to the one or more stacks, the one or more other stacks, the one or more sockets, and the one or more other sockets using a pre-defined memory address resource allocation table.

14. The multi-processor computing system of claim 8 , wherein the firmware device stores further instructions to:

determine if the stack-level memory address resource allocation adjustment and the socket-level memory address resource allocation adjustment failed; and

responsive to determining that the stack-level memory address resource allocation adjustment and the socket-level memory address resource allocation adjustment failed,

assigning memory address resources to the one or more stacks, the one or more other stacks, the one or more sockets, and the one or more other sockets following lowering of a memory address specifying the base memory address of a configuration memory address space.

15. A computer-implemented method, comprising:

detecting an out-of-resource (OOR) condition when performing an allocation of memory address resources to bus devices in the multi-processor computing system;

responsive to detecting the OOR condition, determining whether a socket-level adjustment or a stack-level adjustment of the allocation of memory address resources to the bus devices is to be performed;

responsive to determining that a stack-level adjustment of the allocation of memory address resources is to be performed, performing a stack-level memory address resource allocation adjustment by

identifying memory address resources available from one or more stacks for which sufficient memory address resources were previously allocated, and

assigning the memory address resources available from the one or more stacks to one or more other stacks for which sufficient memory address resources were not previously allocated; and

responsive to determining that a socket-level adjustment of the allocation of memory address resources is to be performed, performing a socket-level memory address resource allocation adjustment by

identifying memory address resources available from one or more sockets for which sufficient memory address resources were previously allocated, and

assigning the memory address resources available from the one or more sockets to one or more other sockets for which sufficient memory address resources were not previously allocated.

16. The computer-implemented method of claim 15 , wherein the OOR condition occurs when the one or more other stacks cannot be allocated memory address resources sufficient to satisfy memory address resource requirements of the one or more other stacks.

17. The computer-implemented method of claim 15 , wherein the OOR condition occurs when the one or more other sockets cannot be allocated memory address resources sufficient to satisfy memory address resource requirements of the one or more other sockets.

18. The computer-implemented method of claim 15 , wherein a stack comprises a collection of bus devices connected to a root bridge of the computer and wherein the one or more sockets and one or more other sockets correspond to processors in the computer.

19. The computer-implemented method of claim 15 , further comprising:

determining if the stack-level memory address resource allocation adjustment and the socket-level memory address resource allocation adjustment failed; and

responsive to determining that the stack-level memory address resource allocation adjustment and the socket-level memory address resource allocation adjustment failed,

assigning memory address resources to the one or more stacks, the one or more other stacks, the one or more sockets, and the one or more other sockets using a pre-defined memory address resource allocation table.

20. The computer-implemented method of claim 15 , further comprising:

determining if the stack-level memory address resource allocation adjustment and the socket-level memory address resource allocation adjustment failed; and

responsive to determining that the stack-level memory address resource allocation adjustment and the socket-level memory address resource allocation adjustment failed,

assigning memory address resources to the one or more stacks, the one or more other stacks, the one or more sockets, and the one or more other sockets following lowering of a memory address specifying the base memory address of a configuration memory address space.

Assignments (5)
PATENT SECURITY AGREEMENT Recorded Oct 23, 2024
From: AMERICAN MEGATRENDS INTERNATIONAL, LLC
To: BAIN CAPITAL CREDIT, LP, AS ADMINISTRATIVE AGENT AND COLLATERAL AGENT
Reel/Frame 069229/0834 →
RELEASE OF SECURITY INTEREST Recorded Oct 17, 2024
From: MIDCAP FINANCIAL TRUST
To: AMERICAN MEGATRENDS INTERNATIONAL, LLC
Reel/Frame 069205/0795 →
SECURITY INTEREST Recorded May 6, 2019
From: AMERICAN MEGATRENDS INTERNATIONAL, LLC
To: MIDCAP FINANCIAL TRUST, AS COLLATERAL AGENT
Reel/Frame 049087/0266 →
ENTITY CONVERSION Recorded Apr 15, 2019
From: AMERICAN MEGATRENDS, INC.
To: AMERICAN MEGATRENDS INTERNATIONAL, LLC
Reel/Frame 049091/0973 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2017
From: KARPAGAVINAYAGAM, MANICKAVASAKAM; DOPPALAPUDI, HARIKRISHNA; HUSSAIN, ALTAF; NALLAGATLA, PURANDHAR
To: AMERICAN MEGATRENDS, INC.
Reel/Frame 044509/0028 →