IP Library Granted Patent US 10,126,867
Granted Patent B2
US 10,126,867 · App. 15/864,806 · Granted Nov 13, 2018

Matched filter for a first order sigma delta capacitance measurement system and a method to determine the same

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,126,867
App. No.
15/864,806
Granted
Nov 13, 2018
Kind
B2
Abstract

A processing system that includes a sigma-delta converter and a filter unit that applies a matched filter to the output of the sigma-delta converter. The processing system drives sensor electrodes for capacitive sensing and receives resulting signals with the sensor electrodes in response. The processing system applies these resulting signals to sigma-delta converters. The matched filter boosts the signal-to-noise ratio of the signal received from the sigma-delta converter, thereby improving the ability to sense presence of an input object. The filter unit may apply different, customized matched filters for different capacitive pixels to improve the signal-to-noise ratio of each capacitive pixel in a customized manner.

Claims (66)

1. A processing system for generating filtered digital data, the processing system comprising:

a sigma-delta converter configured to:

receive a first resulting signal, and

apply sigma-delta conversion to the first resulting signal to generate a first sigma-delta quantized signal; and

a filter logic unit configured to:

determine a first matched filter based on an impedance-characteristic of one or more transmission lines through which the first resulting signal has traveled; and

apply the first matched filter to the first sigma-delta quantized signal to generate a first filtered sigma-delta quantized signal.

2. The processing system of claim 1 , wherein:

the first matched filter is configured to approximate a substantially noise-free resulting signal.

3. The processing system of claim 1 , wherein:

the first matched filter is based on a discrete time cumulative sum signal.

4. The processing system of claim 3 , wherein:

the discrete time cumulative sum signal comprises a series of values, each value being a cumulative sum of a baseline sigma-delta quantized signal up to a phase index corresponding to the value.

5. The processing system of claim 3 , wherein:

the discrete time cumulative sum signal comprises a series of values, each value being a cumulative sum of a time-reversed baseline sigma-delta quantized signal up to a phase index corresponding to the value.

6. The processing system of claim 5 , wherein:

the first matched filter comprises a time-reversed version of the discrete time cumulative sum signal with high frequencies filtered out, the high frequencies substantially equal to or greater than a clock signal frequency that is associated with the baseline sigma-delta quantized signal.

7. The processing system of claim 1 , wherein:

the sigma-delta converter is further configured to:

receive a second resulting signal, and

apply sigma-delta conversion to the second resulting signal to generate a second sigma-delta quantized signal; and

the filter logic unit is further configured to:

determine a second matched filter based on an impedance-characteristic of one or more transmission lines through which the second resulting signal has traveled; and

apply the second matched filter to the second sigma-delta quantized signal to generate a second filtered sigma-delta quantized signal, the second matched filter differing from the first matched filter in a manner that is based on differences in impedance characteristics associated with the first resulting signal and the second resulting signal.

8. The processing system of claim 1 , wherein:

the first matched filter is periodic; and

the filter logic unit is further configured to store the first matched filter as a plurality of constants in a phase-indexed lookup table.

9. The processing system of claim 1 , wherein the filter logic is further configured to:

apply a second matched filter that is phase-shifted with respect to the first matched filter by approximately 90 degrees to the first sigma-delta quantized signal to generate a quadrature-phase filtered sigma-delta quantized signal.

10. A method for generating filtered digital data, the method comprising:

receiving a first resulting signal;

applying sigma-delta conversion to the first resulting signal to generate a first sigma-delta quantized signal; and

determining a first matched filter based on an impedance-characteristic of one or more transmission lines through which the first resulting signal has traveled; and

applying the first matched filter to the first sigma-delta quantized signal to generate a first filtered sigma-delta quantized signal.

11. The method of claim 10 , wherein:

the first matched filter is configured to approximate a substantially noise-free resulting signal.

12. The method of claim 10 , wherein:

the first matched filter is based on a discrete time cumulative sum signal.

13. The method of claim 12 , wherein:

the discrete time cumulative sum signal comprises a series of values, each value being a cumulative sum of a baseline sigma-delta quantized signal up to a phase index corresponding to the value.

14. The method of claim 12 , wherein:

the discrete time cumulative sum signal comprises a series of values, each value being a cumulative sum of a time-reversed baseline sigma-delta quantized signal up to a phase index corresponding to the value.

15. The method of claim 14 , wherein:

the first matched filter comprises a time-reversed version of the discrete time cumulative sum signal with high frequencies filtered out, the high frequencies substantially equal to or greater than a clock signal frequency that is associated with the baseline sigma-delta quantized signal.

16. The method of claim 10 , further comprising:

receiving a second resulting signal;

applying sigma-delta conversion to the second resulting signal to generate a second sigma-delta quantized signal;

determining a second matched filter based on an impedance-characteristic of one or more transmission lines through which the second resulting signal has traveled; and

applying the second matched filter to the second sigma-delta quantized signal to generate a second filtered sigma-delta quantized signal, the second matched filter differing from the first matched filter in a manner that is based on differences in impedance characteristics associated with the first resulting signal and the second resulting signal.

17. The method of claim 10 , wherein:

the first matched filter is periodic; and, the method further comprises:

storing the first matched filter as a plurality of constants in a phase-indexed lookup table.

18. The method of claim 10 , further comprising:

applying a second matched filter that is phase-shifted with respect to the first matched filter by approximately 90 degrees to the first sigma-delta quantized signal to generate a quadrature-phase filtered sigma-delta quantized signal.

19. An input device, comprising:

a plurality of sensing elements; and

a processing system coupled to the plurality of sensing elements, the processing system comprising:

a sigma-delta converter configured to:

receive a first resulting signal with a first sensing element of a plurality of sensing elements, and

apply sigma-delta conversion to the first resulting signal to generate

a first sigma-delta quantized signal; and

a filter logic unit configured to:

determine a first matched filter based on an impedance-characteristic of one or more transmission lines through which the first resulting signal has traveled; and

apply the first matched filter to the first sigma-delta quantized signal to generate a first filtered sigma-delta quantized signal.

20. The input device of claim 19 , wherein:

the first matched filter is configured to approximate a substantially noise-free resulting signal received with the first sensing element.

Assignments (2)
SECURITY INTEREST Recorded Feb 14, 2020
From: SYNAPTICS INCORPORATED
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 051936/0103 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 12, 2018
From: HARGREAVES, KIRK; REYNOLDS, JOSEPH KURTH
To: SYNAPTICS INCORPORATED
Reel/Frame 044613/0061 →