IP Library Patent Application 15866323
Patent Application
App. No. 15/866,323

METHOD FOR POPULATING AND INSTRUCTION VIEW DATA STRUCTURE BY USING REGISTER TEMPLATE SNAPSHOTS

Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US None
App. No.
15/866,323
Abstract

A method for populating an instruction view data structure by using register template snapshots. The method includes receiving an incoming instruction sequence using a global front end; grouping the instructions to form instruction blocks; using a plurality of register templates to track instruction destinations and instruction sources by populating the register template with block numbers corresponding to the instruction blocks, wherein the block numbers corresponding to the instruction blocks indicate interdependencies among the blocks of instructions; populating and instruction view data structure, wherein the instruction view data structure stores instructions corresponding to the instruction blocks as recorded by the plurality of register templates; and using the instruction view data structure to feed a plurality of stacked execution units of execution stage in accordance with the readiness of instruction sources of the instruction blocks.

Claims (41)

1 . A method for feeding instructions to execution units based on interdependencies of instructions, the method comprising:

grouping instructions to form a plurality of instruction blocks, wherein each instruction block in the plurality of instruction blocks includes two or more instructions;

recording an identifier of a first instruction block in the plurality of instruction blocks in a register view data structure based on a destination register referenced by the two or more instructions of the first instruction block, wherein the register view data structure includes a field for each register of a plurality of registers and the identifier of the first instruction block is recorded in a field of the register view data structure corresponding to the destination register referenced by the two or more instructions in the first instruction block;

populating a source view data structure for the first instruction block based on the fields of the register view data structure; and

dispatching instructions to a plurality of execution units of a multistage processor in accordance with a readiness of instruction source registers of the instruction blocks based on the source view data structure of the first instruction block.

2 . The method of claim 1 , wherein the identifier of the first instruction block is recorded in a field of the destination register referenced by the two or more instructions of the first instruction block along with an identifier of a source register referenced by the two or more instructions of the first instruction block.

3 . The method of claim 1 , further comprising:

recording an identifier of a second instruction block in the plurality of instruction blocks in the register view data structure based on a destination register referenced by the two or more instructions of the second instruction block, wherein the identifier of the second instruction block is recorded in a field of the register view data structure corresponding to the destination register referenced by the two or more instructions in the second instruction block.

4 . The method of claim 3 , further comprising:

populating a source view data structure for the second instruction block based on the fields of the register view data structure.

5 . The method of claim 4 , further comprising:

broadcasting the identifier of the first instruction block when the first instruction block dispatches to the plurality of execution units.

6 . The method of claim 5 , further comprising:

setting a ready indication for each entry in the source view data structure for the second instruction block corresponding to the first instruction block in response to receipt of the identifier of the first instruction block.

7 . The method of claim 6 , further comprising:

determining that the second instruction block is ready for dispatch to the plurality of execution units when each entry in the source view data structure for the second instruction block has a ready indication set.

8 . A system for feeding instructions to execution units based on interdependencies of instructions, the method comprising:

a register view data structure to record an identifier of a first instruction block from a plurality of instruction blocks based on a destination register referenced by an instruction of the first instruction block, wherein the register view data structure includes a field for each register of a plurality of registers and the identifier of the first instruction block is recorded in a field of the register view data structure corresponding to the destination register referenced by the instruction of the first instruction block;

a source view data structure for the first instruction block that is populated based on the fields of the register view data structure, and

a plurality of execution units that are dispatched the first instruction block using the source view data structure of the first instruction block in accordance with a readiness of the first instruction block.

9 . The system of claim 8 , wherein the identifier of the first instruction block is recorded in a field of the destination register referenced by the instruction of the first instruction block along with an identifier of a source register referenced by the instruction of the first instruction block.

10 . The system of claim 8 , wherein an identifier of a second instruction block from the plurality of instruction blocks is recorded in the register view data structure based on a destination register referenced by an instruction of the second instruction block, wherein the identifier of the second instruction block is recorded in a field of the register view data structure corresponding to the destination register referenced by the instruction of the second instruction block.

11 . The system of claim 10 , wherein a source view data structure for the second instruction block is populated based on the fields of the register view data structure.

12 . The system of claim 11 , wherein the identifier of the first instruction block is broadcast when the first instruction block dispatches to the plurality of execution units.

13 . The system of claim 12 , wherein a ready indication is set for each entry in the source view data structure for the second instruction block corresponding to the first instruction block in response to receipt of the identifier of the first instruction block.

14 . A machine-readable medium storing instruction that when executed by a processor of a computer system, cause the computer system to:

group instructions to form a plurality of instruction blocks, wherein each instruction block in the plurality of instruction blocks includes two or more instructions;

record an identifier of a first instruction block from the plurality of instruction blocks in a register view data structure based on a destination register referenced by the two or more instructions of the first instruction block, wherein the register view data structure includes a field for each register of a plurality of registers and the identifier of the first instruction block is recorded in a field of the register view data structure corresponding to the destination register referenced by the two or more instructions in the first instruction block;

populate a source view data structure for the first instruction block based on the fields of the register view data structure; and

dispatch instructions to a plurality of execution units of a multistage processor in accordance with a readiness of instruction source registers of the instruction blocks based on the source view data structure of the first instruction block.

15 . The machine-readable medium of claim 14 , wherein the identifier of the first instruction block is recorded in a field of the destination register referenced by the two or more instructions of the first instruction block along with an identifier of a source register referenced by the two or more instructions of the first instruction block.

16 . The machine-readable medium of claim 14 , wherein the instructions when executed by the processor further cause the computer system to:

record an identifier of a second instruction block in the plurality of instruction blocks in the register view data structure based on a destination register referenced by the two or more instructions of the second instruction block, wherein the identifier of the second instruction block is recorded in a field of the register view data structure corresponding to the destination register referenced by the two or more instructions in the second instruction block.

17 . The machine-readable medium of claim 16 , wherein the instructions when executed by the processor further cause the computer system to:

populate a source view data structure for the second instruction block based on the fields of the register view data structure.

18 . The machine-readable medium of claim 17 , wherein the instructions when executed by the processor further cause the computer system to:

broadcast the identifier of the first instruction block when the first instruction block dispatches to the plurality of execution units.

19 . The machine-readable medium of claim 18 , wherein the instructions when executed by the processor further cause the computer system to:

set a ready indication for each entry in the source view data structure for the second instruction block corresponding to the first instruction block in response to receipt of the identifier of the first instruction block.

20 . The machine-readable medium of claim 19 , wherein the instructions when executed by the processor further cause the computer system to:

determine that the second instruction block is ready for dispatch to the plurality of execution units when each entry in the source view data structure for the second instruction block has a ready indication set.