THERMAL CONDUCTION DEVICES AND METHODS FOR EMBEDDED ELECTRONIC DEVICES

1 . A semiconductor device, comprising:

a semiconductor die coupled to a substrate;

a mold compound encapsulating the semiconductor die;

one or more passages in the mold compound between a topside of the mold compound and the semiconductor die; and

a thermal conductor material within the one or more passages.

2 . The semiconductor device further comprising:

a metallization layer coupled to a backside of the semiconductor die.

3 . The semiconductor device of claim 1 further comprising:

wire bonds from the semiconductor die coupled to a topside of the substrate.

4 . The semiconductor device of claim 1 further comprising:

wherein the semiconductor die is a first semiconductor die, the device further comprising a second semiconductor die coupled to the first semiconductor die having a height that is different than a height of the first semiconductor die; and

one or more passages in the mold compound between the topside of the mold compound and the second semiconductor die.

5 . The semiconductor device of claim 1 wherein the one or more passages are an array of passages substantially evenly spaced over the semiconductor die.

6 . The semiconductor device of claim 1 further comprising:

a passivation layer extending over the one or more passages.

7 . The semiconductor device of claim 1 wherein the one or more passages extend through an electrically non-active region of the semiconductor die.

8 . A semiconductor device, comprising:

a first semiconductor die coupled to a substrate;

a second semiconductor die coupled to a backside of the first semiconductor die;

a mold compound encapsulating the first and second semiconductor dies;

one or more passages in the mold compound between a backside of the mold compound and an electrically non-active region of either the first or second semiconductor dies; and

a thermal conductor material within the one or more passages.

9 . The semiconductor device of claim 8 wherein the first semiconductor die is a processor and the second semiconductor die is a memory.

10 . The semiconductor device of claim 8 further comprising:

wire bonds coupled between the second semiconductor die and the substrate.

11 . The semiconductor device of claim 8 wherein the one or more passages in the mold compound are between the backside of the mold compound and the electrically non-active region of the first semiconductor die and between the backside of the mold compound and the electrically non-active region of the second semiconductor die.

12 . The semiconductor device of claim 8 further comprising:

one or more passages in the mold between a backside of the mold compound and an electrically non-active region of the substrate.

13 - 19 . (canceled)