IP Library Granted Patent US 10,291,184
Granted Patent B1
US 10,291,184 · App. 15/866,951 · Granted May 14, 2019

Control of envelope tracker PMIC

Inventors: Ilan Sutskover (Hadera, IL); Eran Segev (Tel Aviv, IL); Stephan Henzler (Munich, DE); Alexander Belitzer (Munich, DE)
Assignee: Intel IP Corporation
H03F1/0222H03F1/34H03F3/24H04W76/27H03F3/189H03F2200/102H03F2200/546H03K23/005
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Quick Facts
Patent No.
US 10,291,184
App. No.
15/866,951
Granted
May 14, 2019
Kind
B1
Abstract

A tracker circuit configured to provide a variable supply voltage to a power amplifier (PA) circuit is disclosed. The tracker circuit comprises a predefined state machine circuit comprising a plurality of states mapped in accordance with transitions associated with a predefined mapping scheme. In some embodiments, the plurality of states of the state machine circuit identify one or more operational modes associated with the tracker circuit, wherein the one or more operational modes comprises one or more voltage levels respectively associated therewith. In some embodiments, the one or more operational modes comprises at least two active operational modes. In some embodiments, a transition between the one or more operational modes of the tracker circuit is dictated by a decoding of a digital selection signal received from a digital communication interface associated therewith.

Claims (34)

1. A tracker circuit configured to provide a variable supply voltage to a power amplifier (PA) circuit comprises:

a predefined state machine circuit comprising a plurality of states mapped in accordance with transitions associated with a predefined mapping scheme, wherein the plurality of states of the state machine circuit identify one or more operational modes associated with the tracker circuit, wherein the one or more operational modes comprises one or more voltage levels respectively associated therewith, wherein the one or more operational modes comprises at least two active operational modes; and

wherein a transition between the one or more operational modes of the tracker circuit is dictated by a decoding of a digital selection signal received from a digital communication interface associated therewith.

2. The circuit of claim 1 , wherein the one or more operational modes associated with the tracker circuit further comprise at least one inactive operational mode.

3. The circuit of claim 1 , wherein the digital communication interface comprises a 2-bit digital interface and the digital selection signal comprises a 2-bit digital signal.

4. The circuit of claim 1 , wherein a transition between the one or more operational modes of the tracker circuit is defined based on mapping the one or more operational modes to predefined trajectories comprising allowable state transitions associated with the predefined mapping scheme.

5. The circuit of claim 1 , wherein the plurality of states within the predefined state machine circuit is mapped, at least partly, based on forbidden transitions associated with the predefined mapping scheme.

6. The circuit of claim 5 , wherein a transition between the one or more operational modes of the tracker circuit is defined based on mapping the one or more operational modes to predefined trajectories comprising, at least partly, the forbidden state transitions associated with the predefined mapping scheme.

7. The circuit of claim 5 , wherein a transition between the one or more operational modes of the tracker circuit is defined, at least partly, based on assigning a forbidden transition associated with the predefined mapping scheme to a unique state associated with the one or more operational modes, wherein the forbidden transition is indicative of the transition between the one or more operational modes.

8. The circuit of claim 1 , wherein the predefined mapping scheme comprises Gray coding.

9. The circuit of claim 1 , wherein the at least two active operational modes of the tracker circuit comprises a first active operational mode comprising an envelope tracking (ET) mode and a second, different, active operational mode comprising an average power tracking (APT) mode.

10. The circuit of claim 1 , wherein the active operational modes comprise operational modes other than an OFF mode or a standby mode or an idle mode.

11. The circuit of claim 2 , wherein the at least one inactive operational mode of the tracker circuit comprises an OFF mode or a standby mode or an idle mode.

12. An apparatus for envelope tracking associated with a power amplifier (PA) system comprises a tracker circuit configured to:

provide a variable supply voltage to the PA circuit,

wherein the tracker circuit comprises a predefined state machine circuit comprising a plurality of states mapped in accordance with transitions associated with a predefined mapping scheme, wherein the plurality of states of the state machine circuit identify one or more operational modes associated with the tracker circuit, wherein the one or more operational modes comprises one or more voltage levels respectively associated therewith, wherein the one or more operational modes comprise at least two different active operational modes; and

wherein a transition between the one or more operational modes of the tracker circuit is dictated by a decoding of a digital selection signal received from a digital communication interface associated therewith.

13. The apparatus of claim 12 , further comprising a digital control line (DCL) circuit comprising the digital communication interface configured to provide the digital selection signal to the tracker circuit.

14. The apparatus of claim 13 , further comprising a level selector circuit configured to:

generate the digital selection signal, based on a measurement associated with the PA circuit; and

provide the digital selection signal to the DCL circuit.

15. The apparatus of claim 12 , wherein the digital communication interface comprises a 2-bit digital interface and the digital selection signal comprises a 2-bit digital signal.

16. The apparatus of claim 12 , wherein the one or more operational modes associated with the tracker circuit further comprises at least one inactive operational mode.

17. The circuit of claim 12 , wherein the transition between the one or more operational modes of the tracker circuit is defined based on mapping the one or more operational modes to predefined trajectories of the state machine circuit, wherein the predefined trajectories comprises allowable state transitions associated with a predefined mapping scheme.

18. The circuit of claim 12 , wherein the plurality of states within the predefined state machine circuit is mapped, at least partly, based on forbidden transitions associated with a predefined mapping scheme.

19. The circuit of claim 18 , wherein a transition between the one or more operational modes of the tracker circuit is achieved based on mapping the one or more operational modes to predefined trajectories of the state machine circuit, wherein the predefined trajectories comprises allowable state transitions or the forbidden state transitions or both, associated with the predefined mapping scheme.

20. The circuit of claim 18 , wherein a transition between the one or more operational modes of the tracker circuit is defined, at least partly, based on assigning a forbidden transition associated with the predefined mapping scheme to unique states associated with the one or more operational modes, wherein the forbidden transition is indicative of the transition between the one or more operational modes.

21. The apparatus of claim 12 , wherein the predefined mapping scheme comprises Gray coding.

22. A tracker circuit configured to provide a variable supply voltage to a power amplifier (PA) circuit comprises:

a predefined state machine circuit comprising a plurality of states mapped in accordance with transitions associated with a predefined mapping scheme, wherein the plurality of states of the state machine circuit identify one or more operational modes associated with the tracker circuit, wherein the one or more operational modes comprises one or more voltage levels respectively associated therewith, wherein the transitions associated with the predefined mapping scheme comprises forbidden transitions associated with the predefined mapping scheme; and

wherein a transition between the one or more operational modes of the tracker circuit is defined, at least partly, based on the forbidden transitions associated with the predefined mapping scheme.

23. The circuit of claim 22 , wherein a transition between the one or more operational modes of the tracker circuit is defined based on mapping the one or more operational modes to predefined trajectories of the state machine circuit, wherein the predefined trajectories comprises allowable state transitions or the forbidden state transitions or both, associated with the predefined mapping scheme.

24. The circuit of claim 22 , wherein a transition between the one or more operational modes of the tracker circuit is defined, at least partly, based on assigning a forbidden transition associated with the predefined mapping scheme to unique states associated with the one or more operational modes, wherein the forbidden transition is indicative of the transition between the one or more operational modes.

25. The circuit of claim 22 , wherein a transition between the one or more operational modes of the tracker circuit is dictated by a decoding of a digital selection signal received from a digital communication interface associated therewith.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 20, 2021
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 056323/0278 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 29, 2019
From: HENZLER, STEPHAN; BELITZER, ALEXANDER
To: INTEL IP CORPORATION
Reel/Frame 048736/0687 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2018
From: SUTSKOVER, ILAN; SEGEV, ERAN
To: INTEL IP CORPORATION
Reel/Frame 044585/0442 →
Cited By (3)
US 12,413,147 US 12,573,993 US 12,707,396