IP Library Granted Patent US 10,732,955
Granted Patent B2
US 10,732,955 · App. 15/867,837 · Granted Aug 4, 2020

Electronic apparatus and information processing system

Inventor: Aki Fukuda (Yokohama, JP)
Assignees: Kabushiki Kaisha Toshiba; Toshiba Infrastructure Systems & Solutions Corporation
G06F8/65G06F8/66G06F16/2365G06F21/44
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Quick Facts
Patent No.
US 10,732,955
App. No.
15/867,837
Granted
Aug 4, 2020
Kind
B2
Abstract

An electronic apparatus has a communication unit, a first storage unit, a second storage unit, and a controller. The communication unit communicates with a terminal apparatus. The first storage unit stores a first program. The second unit stores a patch program for the first program received from the terminal apparatus via the communication unit for each section. When executing the first program, the controller applies the latest patch program stored in each section in the second storage unit.

Claims (53)

1. An IC card comprising:

a communication controller configured to communicate with a terminal apparatus;

a first memory configured to store a first program;

a second memory configured to store, for each of a plurality of sections, a patch program for the first program, the patch program being received from the terminal apparatus via the communication controller; and

a controller configured to include a hardware circuit and to apply, in a case of executing the first program, a latest patch program stored in the sections in the second memory, wherein

the second memory is configured to store:

information indicating presence of the patch program for each of the sections as management information,

information indicating absence of the patch program for each of the sections as the management information,

information indicating validity of the patch program for each of the sections as the management information, and

information indicating invalidity of the patch program for each of the sections as the management information, and

the controller is configured to:

set the management information of a section designated by a section data write command from the terminal apparatus, to presence,

set the management information of a section designated by a section validation command from the terminal apparatus, to validity,

set the management information of a section designated by a section invalidation command from the terminal apparatus, to invalidity,

set the management information of a section designated by a section deletion command from the terminal apparatus, to absence, and

specify an appropriate section, which stores a patch program whose presence and validity are indicated by the management information, as containing a valid patch program to be applied to the first program.

2. The IC card according to claim 1 , wherein a section number is set to each section in chronological order of storing the patch program to a respective section.

3. The IC card according to claim 2 , wherein the controller, upon receiving a new patch program via the communication controller, adds a new section to be managed using the management information, and stores the received new patch program to the new section with a largest section number.

4. The IC card according to claim 2 , wherein the controller searches the sections existing in the second memory with reference to the management information, in order from the largest section number to a smallest section number, for a section which stores the patch program whose presence and validity are indicated by the management information.

5. The IC card according to claim 1 , wherein the controller receives the patch program from the terminal apparatus after authentication with the terminal apparatus is successfully performed.

6. The IC card according to claim 1 , wherein the controller exchanges session keys in authentication with the terminal apparatus, and receives the patch program from the terminal apparatus by secure messaging that uses the session keys.

7. The IC card according to claim 1 , further comprising:

a third memory that stores a fixed key,

wherein the controller receives the patch program from the terminal apparatus by secure messaging that uses the fixed key.

8. The IC card according to claim 1 , further comprising:

a chassis having the communication controller, the first memory, the second memory, and the controller; and

a housing in which the chassis is embedded.

9. The IC card according to claim 1 , wherein, before storing the patch program to a section of the sections, the management information of the section indicates absence and invalidity.

10. The IC card according to claim 1 , wherein before storing the patch program to a section of the sections, the management information of the section indicates absence and invalidity.

11. An information processing system comprising a terminal apparatus and an IC card, wherein

the terminal apparatus includes:

a first communication controller configured to communicate with the IC card; and

a first controller configured to include a hardware circuit and to transmit a patch program that is to be applied to a program in the IC card to the IC card via the first communication controller,

the IC card includes:

a second communication controller configured to communicate with the terminal apparatus;

a first memory configured to store the program to which the patch program transmitted from the terminal apparatus is to be applied;

a second memory configured to store, for each of a plurality of sections, the patch program received from the terminal apparatus via the second communication controller; and

a second controller configured to include a hardware circuit and to apply, in a case of executing the first program, a latest patch program stored in the sections in the second memory,

the second memory is configured to store:

information indicating presence of the patch program for each of the sections as management information,

information indicating absence of the patch program for each of the sections as the management information,

information indicating validity of the patch program for each of the sections as the management information, and

information indicating invalidity of the patch program for each of the sections as the management information, and

the second controller is configured to:

set the management information of a section designated by a section data write command from the terminal apparatus, to presence,

set the management information of a section designated by a section validation command from the terminal apparatus, to validity,

set the management information of a section designated by a section invalidation command from the terminal apparatus, to invalidity,

set the management information of a section designated by a section deletion command from the terminal apparatus, to absence, and

specify an appropriate section, which stores a patch program whose presence and validity are indicated by the management information, as containing a valid patch program to be applied to the first program.

12. The information processing system according to claim 11 , wherein

the terminal apparatus further includes:

a third communication controller configured to communicate with a host apparatus, and

the first controller receives the patch program that is to be applied to a program in the IC card from the host apparatus via the third communication controller, and transmits the patch program received from the host apparatus to the IC card via the first communication controller.

Assignments (2)
MERGER Recorded Jul 29, 2025
From: TOSHIBA INFRASTRUCTURE SYSTEMS & SOLUTIONS CORPORATION
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 072239/0263 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 14, 2018
From: FUKUDA, AKI
To: KABUSHIKI KAISHA TOSHIBA; TOSHIBA INFRASTRUCTURE SYSTEMS & SOLUTIONS CORPORATION
Reel/Frame 044919/0957 →
Priority Claims (1)
JP 2017-003143 · Jan 12, 2017 · national
Continuity (1)
Related Publication 20180196661A1 · Jul 12, 2018