IP Library Granted Patent US 10,496,285
Granted Patent B1
US 10,496,285 · App. 15/874,282 · Granted Dec 3, 2019

Techniques for increased I/O performance

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Quick Facts
Patent No.
US 10,496,285
App. No.
15/874,282
Granted
Dec 3, 2019
Kind
B1
Abstract

Techniques for processing I/O operations may include: detecting, at a host, a sequence of I/O operations to be sent from the host to a data storage system, wherein each of the I/O operations of the sequence specifies a target address included in a first logical address subrange of a first logical device; sending, from the host, the sequence of I/O operations to a same target port of the data storage system, wherein each of the I/O operations of the sequence includes an indicator denoting whether resources used by the same target port in connection with processing said each I/O operation are to be released subsequent to completing processing of said each I/O operation; receiving the sequence of I/O operations at the same target port of the data storage system; and processing the sequence of I/O operations.

Claims (40)

1. A method of processing I/O operations comprising:

detecting, at a host, a sequence of I/O operations to be sent from the host to a data storage system, wherein each of the I/O operations of the sequence specifies a target address included in a first logical address subrange of a first logical device;

subsequent to performing said detecting the sequence of I/O operations, sending, from the host, the sequence of I/O operations to a same target port of the data storage system, wherein each of the I/O operations of the sequence includes an indicator denoting whether resources used by the same target port in connection with processing said each I/O operation are to be released subsequent to completing processing of said each I/O operation;

receiving the sequence of I/O operations at the same target port of the data storage system; and

processing the sequence of I/O operations received at the same target port of the data storage system, wherein said processing the sequence of I/O operations received at the same target port of the data storage system includes:

determining that a first I/O operation of the sequence received at the same target port denotes a start of a new sequence of I/O operations directed to the first logical address subrange of the first logical device, wherein the start of the new sequence of I/O operations is determined when the first I/O operation includes a corresponding indicator that indicates to retain and not release resources used by the same target port in connection with processing the first I/O operation subsequent to completing processing of the first I/O operation, and wherein the first I/O operation is directed to a first target address included in the first logical address subrange of the first logical device and there is currently no detected pending sequence of I/O operations directed to the first logical address subrange of the first logical device; and

determining that a last I/O operation of the sequence received at the same target port denotes an end of the new sequence of I/O operations directed to the first logical address subrange of the first logical device, wherein the end of the new sequence of I/O operations is denoted by the last I/O operation including a corresponding indicator that indicates to release resources used by the same target port in connection with processing the last I/O operation subsequent to completing processing of the last I/O operation, and wherein the last I/O operation is directed to a target address included in the first logical address subrange of the first logical device and there is currently a detected pending sequence of I/O operations directed to the first logical address subrange of the first logical device.

2. The method of claim 1 , wherein a driver of the host sets the indicator in each of the I/O operations of the sequence and wherein the first logical device is accessible to the host through a plurality of target ports of the data storage system, wherein the same target port is included as one of the plurality of target ports of the data storage system.

3. The method of claim 2 , wherein the indicator for each of the I/O operations in the sequence other than a last one of the I/O operations of the sequence indicates to retain and not release resources used by the same target port in connection with processing said each I/O operation subsequent to completing processing of said each I/O operation.

4. The method of claim 3 , wherein the indicator of the last one of the I/O operations of the sequence indicates to release resources used by the same target port in connection with processing the last one of the I/O operations subsequent to completing processing of the last one of the I/O operations of the sequence.

5. The method of claim 1 , wherein the first logical address subrange corresponds to a track including a plurality of blocks of data stored on the first logical device.

6. The method of claim 1 , wherein each I/O operation of the sequence is a write operation and the sequence of write operations writes to consecutive sequential logical addresses of the first logical address subrange.

7. The method of claim 6 , wherein each of the write operations of the sequence includes an I/O tag denoting that said each write operation is included in a write sequence of multiple write operations that write to consecutive sequential logical addresses of the first logical address subrange.

8. The method of claim 7 , wherein a driver of the host sets the indicator and the I/O tag in each of the I/O operations of the sequence and wherein the first logical device is accessible to the host through a plurality of target ports of the data storage system, the plurality of target ports including the same target port.

9. The method of claim 1 , wherein the I/O operations of the sequence are not directed to consecutive sequential logical addresses of the first logical address subrange.

10. The method of claim 1 , wherein the sequence includes at least one read operation and at least one write operation.

11. The method of claim 1 , wherein the sequence includes only write operations.

12. The method of claim 1 , wherein the sequence includes only read operations.

13. The method of claim 1 , wherein the first logical device includes a second logical address subrange of a logical address space of the first logical device, and the first logical address subrange and the second logical address subrange are contiguous and consecutive logical address subranges of the first logical device, and the method includes:

issuing, by an application on the host, an I/O operation having a target address range that includes one or more logical addresses of the first logical address subrange and one or more logical addresses of the second logical address subrange;

partitioning the I/O operation into a first I/O operation and a second I/O operation, wherein the first I/O operation is directed to the one or more logical addresses of the first logical address subrange and the second I/O operation is directed to the one or more logical addresses of the second logical address subrange, wherein the first I/O operation is included in the sequence of I/O operations; and

sending, from the host, a second sequence of I/O operations to a second target port of the data storage system, wherein each of the I/O operations of the second sequence includes an indicator denoting whether resources used by the second target port in connection with processing said each I/O operation are to be released subsequent to completing processing of said each I/O operation, wherein each I/O operation of the second sequence is directed to a target address in the second logical address subrange.

14. A system comprising:

one or more processors; and

a memory comprising code stored thereon that, when executed by at least a first of the one or more processors, performs a method of processing I/O operations comprising:

detecting, at a host, a sequence of I/O operations to be sent from the host to a data storage system, wherein each of the I/O operations of the sequence specifies a target address included in a first logical address subrange of a first logical device;

subsequent to performing said detecting the sequence of I/O operations, sending, from the host, the sequence of I/O operations to a same target port of the data storage system, wherein each of the I/O operations of the sequence includes an indicator denoting whether resources used by the same target port in connection with processing said each I/O operation are to be released subsequent to completing processing of said each I/O operation;

receiving the sequence of I/O operations at the same target port of the data storage system; and

processing the sequence of I/O operations received at the same target port of the data storage system, wherein said processing the sequence of I/O operations received at the same target port of the data storage system includes:

determining that a first I/O operation of the sequence received at the same target port denotes a start of a new sequence of I/O operations directed to the first logical address subrange of the first logical device, wherein the start of the new sequence of I/O operations is determined when the first I/O operation includes a corresponding indicator that indicates to retain and not release resources used by the same target port in connection with processing the first I/O operation subsequent to completing processing of the first I/O operation, and wherein the first I/O operation is directed to a first target address included in the first logical address subrange of the first logical device and there is currently no detected pending sequence of I/O operations directed to the first logical address subrange of the first logical device; and

determining that a last I/O operation of the sequence received at the same target port denotes an end of the new sequence of I/O operations directed to the first logical address subrange of the first logical device, wherein the end of the new sequence of I/O operations is denoted by the last I/O operation including a corresponding indicator that indicates to release resources used by the same target port in connection with processing the last I/O operation subsequent to completing processing of the last I/O operation, and wherein the last I/O operation is directed to a target address included in the first logical address subrange of the first logical device and there is currently a detected pending sequence of I/O operations directed to the first logical address subrange of the first logical device.

15. A non-transitory computer readable medium comprising code stored thereon that, when executed, performs a method of processing I/O operations comprising:

detecting, at a host, a sequence of I/O operations to be sent from the host to a data storage system, wherein each of the I/O operations of the sequence specifies a target address included in a first logical address subrange of a first logical device;

subsequent to performing said detecting the sequence of I/O operations, sending, from the host, the sequence of I/O operations to a same target port of the data storage system, wherein each of the I/O operations of the sequence includes an indicator denoting whether resources used by the same target port in connection with processing said each I/O operation are to be released subsequent to completing processing of said each I/O operation;

receiving the sequence of I/O operations at the same target port of the data storage system; and

processing the sequence of I/O operations received at the same target port of the data storage system, wherein said processing the sequence of I/O operations received at the same target port of the data storage system includes:

determining that a first I/O operation of the sequence received at the same target port denotes a start of a new sequence of I/O operations directed to the first logical address subrange of the first logical device, wherein the start of the new sequence of I/O operations is determined when the first I/O operation includes a corresponding indicator that indicates to retain and not release resources used by the same target port in connection with processing the first I/O operation subsequent to completing processing of the first I/O operation, and wherein the first I/O operation is directed to a first target address included in the first logical address subrange of the first logical device and there is currently no detected pending sequence of I/O operations directed to the first logical address subrange of the first logical device; and

determining that a last I/O operation of the sequence received at the same target port denotes an end of the new sequence of I/O operations directed to the first logical address subrange of the first logical device, wherein the end of the new sequence of I/O operations is denoted by the last I/O operation including a corresponding indicator that indicates to release resources used by the same target port in connection with processing the last I/O operation subsequent to completing processing of the last I/O operation, and wherein the last I/O operation is directed to a target address included in the first logical address subrange of the first logical device and there is currently a detected pending sequence of I/O operations directed to the first logical address subrange of the first logical device.

16. The non-transitory computer readable medium of claim 15 , wherein a driver of the host sets the indicator in each of the I/O operations of the sequence and wherein the first logical device is accessible to the host through a plurality of target ports of the data storage system, wherein the same target port is included as one of the plurality of target ports of the data storage system.

17. The non-transitory computer readable medium of claim 16 , wherein the indicator for each of the I/O operations in the sequence other than a last one of the I/O operations of the sequence indicates to retain and not release resources used by the same target port in connection with processing said each I/O operation subsequent to completing processing of said each I/O operation and wherein the indicator of the last one of the I/O operations of the sequence indicates to release resources used by the same target port in connection with processing the last one of the I/O operations subsequent to completing processing of the last one of the I/O operations of the sequence.

Assignments (7)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (045482/0131) Recorded May 20, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO WYSE TECHNOLOGY L.L.C.)
Reel/Frame 061749/0924 →
RELEASE OF SECURITY INTEREST AT REEL 045482 FRAME 0395 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; WYSE TECHNOLOGY L.L.C.
Reel/Frame 058298/0314 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Mar 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; WYSE TECHNOLOGY L.L.C.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 045482/0131 →
PATENT SECURITY AGREEMENT (CREDIT) Recorded Mar 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; WYSE TECHNOLOGY L.L.C.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 045482/0395 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 18, 2018
From: JUNG, JAEYOO; DODDAIAH, RAMESH; MARTIN, OWEN; DON, ARIEH
To: EMC IP HOLDING COMPANY LLC
Reel/Frame 044657/0104 →