IP Library Granted Patent US 10,229,734
Granted Patent B1
US 10,229,734 · App. 15/875,685 · Granted Mar 12, 2019

Method and system for storing and recovering data from flash memory

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Quick Facts
Patent No.
US 10,229,734
App. No.
15/875,685
Granted
Mar 12, 2019
Kind
B1
Abstract

Embodiments of the technology relate to storing user data and metadata in persistent storage in the event of a power failure and then recovering such stored data and metadata when power is restored.

Claims (49)

1. A method for storing data, comprising:

writing a frag to an open data page in vaulted memory, wherein the open data page comprises a first table of contents (TOC) bit and a first physical address;

writing a table of contents entry (TE) for the frag to an open TOC page in the vaulted memory, wherein the open TOC page comprises a second TOC bit and a second physical address;

making a first determination that the open data page is full;

based on the first determination, writing the frag to a page in a solid state memory module, wherein the page is associated with the first physical address,

wherein the solid state memory module and the vaulted memory are located in a storage module,

wherein the solid state memory module is flash memory.

2. The method of claim 1 , further comprising:

writing a first tag to the open data page prior to writing the TE to the open TOC page, wherein a second tag in the open TOC page comprises the second TOC bit and the second physical address.

3. The method of claim 1 , wherein the first physical address and the second physical address are located are associated with the same block in the solid state memory module.

4. The method of claim 1 , further comprising:

making a second determination that the open TOC page is full;

based on the second determination, replacing the second physical address with a third physical address;

writing the TE to a second page in the solid state memory module, wherein the second page is associated with the third physical address.

5. The method of claim 4 , wherein the first physical address and the third physical address are located are associated with the same block in the solid state memory module.

6. A storage module, comprising:

a memory comprising vaulted memory;

a solid state memory module; and

a storage module controller programmed to:

write a frag to an open data page in the vaulted memory, wherein the open data page comprises a first table of contents (TOC) bit and a first physical address;

write a table of contents entry (TE) for the frag to an open TOC page in the vaulted memory, wherein the open TOC page comprises a second TOC bit and a second physical address;

make a first determination that the open data page is full;

based on the first determination, write the frag to a page in the solid state memory module, wherein the page is associated with the first physical address,

wherein the solid state memory module is flash memory.

7. The storage module of claim 6 , wherein the storage module controller is further programmed to:

write a first tag to the open data page prior to writing the TE to the open TOC page, wherein a second tag in the open TOC page comprises the second TOC bit and the second physical address.

8. The storage module of claim 6 , wherein the first physical address and the second physical address are located are associated with the same block in the solid state memory module.

9. The storage module of claim 6 , wherein the storage module controller is further programmed to:

make a second determination that the open TOC page is full;

based on the second determination, replace the second physical address with a third physical address;

write the TE to a second page in the solid state memory module, wherein the second page is associated with the third physical address.

10. The storage module of claim 9 , wherein the first physical address and the third physical address are located are associated with the same block in the solid state memory module.

11. The storage module of claim 6 , wherein the vaulted memory is a partition of the memory.

12. The storage module of claim 11 , wherein the memory further comprises a cache, wherein the cache is a second partition of the memory.

13. A non-transitory computer readable medium for storing data comprising computer readable program code for:

writing a frag to an open data page in vaulted memory, wherein the open data page comprises a first table of contents (TOC) bit and a first physical address;

writing a table of contents entry (TE) for the frag to an open TOC page in the vaulted memory, wherein the open TOC page comprises a second TOC bit and a second physical address;

making a first determination that the open data page is full;

based on the first determination, writing the frag to a page in a solid state memory module, wherein the page is associated with the first physical address,

wherein the solid state memory module and the vaulted memory are located in a storage module,

wherein the solid state memory module is flash memory.

14. The non-transitory computer readable medium of claim 13 , wherein the method further comprises:

writing a first tag to the open data page prior to writing the TE to the open TOC page, wherein a second tag in the open TOC page comprises the second TOC bit and the second physical address.

15. The non-transitory computer readable medium of claim 13 , wherein the first physical address and the second physical address are located are associated with the same block in the solid state memory module.

16. The non-transitory computer readable medium of claim 13 , wherein the method further comprises:

making a second determination that the open TOC page is full;

based on the second determination, replacing the second physical address with a third physical address;

writing the TE to a second page in the solid state memory module, wherein the second page is associated with the third physical address.

17. The non-transitory computer readable medium of claim 16 , wherein the first physical address and the third physical address are located are associated with the same block in the solid state memory module.

Assignments (11)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (050724/0466) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO WYSE TECHNOLOGY L.L.C.)
Reel/Frame 060753/0486 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (045482/0131) Recorded May 20, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO WYSE TECHNOLOGY L.L.C.)
Reel/Frame 061749/0924 →
RELEASE OF SECURITY INTEREST AT REEL 045482 FRAME 0395 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; WYSE TECHNOLOGY L.L.C.
Reel/Frame 058298/0314 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Oct 15, 2019
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; WYSE TECHNOLOGY L.L.C.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 050724/0466 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2018
From: EMC CORPORATION
To: EMC IP HOLDING COMPANY LLC
Reel/Frame 046438/0204 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2018
From: NIEUWEJAAR, NILS; BONWICK, JEFFREY S.
To: EMC CORPORATION
Reel/Frame 045598/0872 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Mar 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; WYSE TECHNOLOGY L.L.C.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 045482/0131 →
PATENT SECURITY AGREEMENT (CREDIT) Recorded Mar 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; WYSE TECHNOLOGY L.L.C.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 045482/0395 →