Systems and methods for capacitor module balancing and maintenance
In one aspect, the invention comprises an apparatus for balancing cells in a series string of modules having cells. The apparatus comprises a processing system and a communication circuit. The processing circuit is configured to receive an average cell voltage value from each module. The processing circuit is further configured to determine an overall average cell voltage for all the cells. The processing circuit is also configured to cause each the modules to determine a relative capacitance for each of its cells and cause each of the modules to balance its cells based on the respective relative capacitances. The communication circuit is configured to receive the average cell voltage value from the modules.
1. An apparatus for balancing cells, comprising:
a plurality of modules each comprising one or more cells, each cell at a respective cell voltage; and
a processing system communicatively coupled to each of the plurality of modules and configured to:
receive an average cell voltage value for each of the plurality of modules from each of the plurality of modules,
determine an overall average cell voltage for the plurality of modules,
cause each of the plurality of modules to determine a relative capacitance for each of its cells based on the overall average cell voltage, and
cause each of the plurality of modules to balance its cells to generate a system setpoint voltage between a maximum combined voltage of the plurality of modules or a combined voltage of zero volts based on the respective relative capacitances for each of the cells of the module, wherein the system setpoint voltage is dynamically adjusted.
2. The apparatus of claim 1 , wherein the processing system is further configured to:
determine a maximum low voltage cell difference, and
establish the maximum low voltage cell difference as a constraint on the cells,
wherein the constraint causes a difference between a first cell having a maximum cell voltage of all the cells in the string of modules and a second cell having a minimum cell voltage of all the cells in the string of modules to be equal to or less than the maximum low voltage cell difference.
3. The apparatus of claim 1 , wherein the processing system is configured to cause each of the plurality of modules to determine a relative capacitance for each of the cells of the module based on causing each of the cells to be charged to a maximum cell value and discharged to a minimum cell value.
4. The apparatus of claim 1 , wherein the processing system is further configured to receive an indication from each of the plurality of modules that each of the cells of the plurality of modules is balanced.
5. The apparatus of claim 4 , wherein the processing system is further configured to generate an instruction to each of the plurality of modules to discharge each of the cells of the plurality of modules to attain a maximum system voltage.
6. The apparatus of claim 1 , wherein the processing system is further configured to generate an instruction to each of the plurality of modules to discharge each of the cells of the module to zero volts.
7. The apparatus of claim 6 , wherein the processing system is configured to fully discharge each of the cells of each of the plurality of modules via one of a passive discharge component, an active discharge component, or a combination passive/active discharge component.
8. The apparatus of claim 1 , wherein the processing system is configured to cause each of the plurality of modules to balance the cells of the module based on at least one of a discharge of excess positive cell voltages and a discharge of excess negative cell voltages.
9. The apparatus of claim 1 , wherein the processing system is further configured to generate a request for the average cell voltage value from each of the plurality of modules.
10. The apparatus of claim 1 , wherein the processing system is further configured to communicate the overall average cell voltage to each of the plurality of modules.
11. The apparatus of claim 1 , wherein:
the average cell voltage comprises an average module target voltage (AMTV),
the overall average cell voltage comprises a minimum AMTV from the AMTVs received from each of the plurality of modules,
the processing system is further configured to cause each of the plurality of modules to determine an adjusted cell target voltage based on the minimum AMTV, and
the processing system causes each of the plurality of modules to balance the cells of the module based on the respective relative capacitances for each of the cells of the module and the adjusted cell target voltage.
12. A method of balancing cells, comprising:
receiving an average cell voltage value for each of a plurality of modules arranged in a string from each of the plurality of modules, each of the plurality of modules comprising one or more cells, each cell at a respective cell voltage;
determining, by a processing system, an overall average cell voltage for the plurality of modules;
causing, by the processing system, each of the plurality of modules to determine a relative capacitance for each of its cells based on the overall average cell voltage; and
causing, by the processing system, each of the plurality of modules to balance its cells to balance the cells comprises causing each of the plurality of modules to balance its cells to generate a system setpoint voltage between a maximum combined voltage of the plurality of modules or a combined voltage of zero volts based on the respective relative capacitances for each of the cells of the module,
wherein the system setpoint voltage is dynamically adjusted.
13. The method of claim 12 , further comprising:
determining a maximum low voltage cell difference;
establishing the maximum low voltage cell difference as a constraint on the cells;
transmitting the constraint to each of the plurality of modules; and
causing a difference between a first cell having a maximum cell voltage of all the cells in the string of modules and a second cell having a minimum cell voltage of all the cells in the string of modules to be equal to or less than the maximum low voltage cell difference.
14. The method of claim 12 , wherein causing each of the plurality of modules to determine a relative capacitance for each of the cells of the module comprises causing each of the cells to be charged to a maximum cell value and discharged to a minimum cell value.
15. The method of claim 12 , further comprising:
receiving an indication that each of the cells of the plurality of modules are balanced, wherein the indications are received from each of the plurality of modules.
16. The method of claim 12 , wherein causing each of the plurality of modules to balance the cells of the module comprises causing each of the plurality of modules to balance the cells of the module based on at least one of a discharge of excess positive cell voltages and a discharge of excess negative cell voltages.
17. The method of claim 12 , wherein the average cell voltage comprises an average module target voltage (AMTV) and wherein the overall average cell voltage comprises a minimum AMTV from the AMTVs received from each of the plurality of modules, and further comprising causing each of the plurality of modules to determine an adjusted cell target voltage based on the minimum AMTV, wherein causing each of the plurality of modules to balance its cells based on the respective relative capacitances for each of its cells comprises causing each of the plurality of modules to balance its cells based on the respective relative capacitances for each of its cells and the adjusted cell target voltage.
18. A non-transitory computer readable medium comprising instructions stored thereon that when executed by at least one processor of a computing device cause the computing device to:
receive an average cell voltage value for each of a plurality of modules arranged in a string from each of the plurality of modules, each of the plurality of modules comprising one or more cells;
determine, by a processor of the computing device, an overall average cell voltage for the plurality of modules;
cause, by the processor, each of the plurality of modules to determine a relative capacitance for each of its cells; and
cause, by the processor, each of the plurality of modules to balance its cells to generate a system setpoint voltage between a maximum combined voltage of the plurality of modules or a combined voltage of zero volts based on the respective relative capacitances for each of its cells wherein the system setpoint voltage is dynamically adjusted.