IP Library Granted Patent US 10,545,568
Granted Patent B2
US 10,545,568 · App. 15/881,451 · Granted Jan 28, 2020

Modified sleep state graphics processing system

Inventors: Thomas Alexander Shows (Cedar Park, TX); Chung Shou Wu (Taipei, TW)
Assignee: Dell Products L.P.
G06F1/3293G06T1/20
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Quick Facts
Patent No.
US 10,545,568
App. No.
15/881,451
Filed
Jan 26, 2018
Granted
Jan 28, 2020
Kind
B2
Art Unit
2612
USPC
345/520
Abstract

A modified sleep state graphics processing system includes a graphics processing system coupled to a central processing system that is configured to enter different sleep states. A power management engine coupled to the graphics processing system and the central processing system determines that the graphics processing system is operating above a graphics processing activity threshold and, in response, prevents the central processing system from entering a first subset of the different sleep states. The central processing system is configured to communicate with the graphics processing system to cause the graphics processing system to render graphics while prevented from entering the first subset of the different sleep states. The power management engine may then determine that the graphics processing system is operating below the graphics processing activity threshold and, in response, allow the central processing system to enter the first subset of the different sleep states.

Claims (48)

1. A modified sleep state graphics processing system, comprising:

a graphics processing system;

a central processing system that is coupled to the graphics processing system and that is configured to enter a plurality of different sleep states; and

a power management engine that is coupled to the graphics processing system and the central processing system, wherein the power management engine is configured to:

determine that the graphics processing system is operating above a graphics processing activity threshold;

detect a connection to an external power supply;

prevent, in response to determining that the graphics processing system is operating above the graphics processing activity threshold and detecting the connection to the external power supply, the central processing system from entering a first subset of the plurality of different sleep states, wherein the central processing system is configured to communicate with the graphics processing system to cause the graphics processing system to render graphics while prevented from entering the first subset of the plurality of different sleep states;

determine that the graphics processing system is operating below the graphics processing activity threshold; and

allow, in response to determining that the graphics processing system is operating below the graphics processing activity threshold, the central processing system to enter the first subset of the plurality of different sleep states.

2. The system of claim 1 , wherein the power management engine is configured to:

allow the central processing system to enter a second subset of the plurality of different sleep states while preventing the central processing system from entering the first subset of the plurality of different sleep states; and

cause the central processing system to transition from the second subset of the plurality of different sleep states to an operating state in order to communicate with the graphics processing system to cause the graphics processing system to render graphics.

3. The system of claim 2 , wherein the second subset of the plurality of different sleep states is a C1 sleep state defined by the Advanced Configuration and Power Interface (ACPI) standard.

4. The system of claim 2 , wherein the second subset of the plurality of different sleep states are associated with a latency variability that is lower than the first subset of the plurality of different sleep states.

5. The system of claim 1 , wherein the determining that the graphics processing system is operating above the graphics processing activity threshold includes at least one of:

determining that a graphics processing system temperature of the graphics processing system is above a temperature threshold;

determining that a graphics processing system power consumption of the graphics processing system is above a power consumption threshold; and

determining that a graphics processing system utilization of the graphics processing system is above a utilization threshold.

6. The system of claim 1 , wherein the determining that the graphics processing system is operating above the graphics processing activity threshold includes determining that the graphics processing system has rendered graphics within a time period, and wherein the determining that the graphics processing system is operating below the graphics processing activity threshold includes determining that the graphics processing system has not rendered graphics within the time period.

7. An Information Handling System (IHS), comprising:

a processing system; and

a memory system that is coupled to the processing system and that includes instructions that, when executed by the processing system, cause the processing system to:

determine that a Graphics Processing Unit (GPU) is operating above a GPU activity threshold;

detect a connection to an external power supply;

prevent, in response to determining that the GPU is operating above the GPU activity threshold and detecting the connection to the external power supply, a Central Processing Unit (CPU) from entering a first subset of a plurality of different sleep states available to the CPU, wherein the CPU communicates with the GPU to cause the GPU to render graphics while prevented from entering the first subset of the plurality of different sleep states;

determine that the GPU is operating below the GPU activity threshold; and

allow, in response to determining that the GPU is operating below the GPU activity threshold, the CPU to enter the first subset of the plurality of different sleep states.

8. The IHS of claim 7 , wherein the instructions, when executed by the processing system, cause the processing system to:

allow the CPU to enter a second subset of the plurality of different sleep states while preventing the CPU from entering the first subset of the plurality of different sleep states; and

cause the CPU to transition from the second subset of the plurality of different sleep states to an operating state in order to communicate with the GPU to cause the GPU to render graphics.

9. The IHS of claim 8 , wherein the second subset of the plurality of different sleep states is a C1 sleep state defined by the Advanced Configuration and Power Interface (ACPI) standard.

10. The IHS of claim 8 , wherein the second subset of the plurality of different sleep states are associated with a latency variability that is lower than the first subset of the plurality of different sleep states.

11. The IHS of claim 7 , wherein the determining that the GPU is operating above the GPU activity threshold includes determining that the GPU has rendered graphics within a time period, and wherein the determining that the GPU is operating below the GPU activity threshold includes determining that the GPU has not rendered graphics within the time period.

12. A method for providing modified sleep state graphic processing, comprising:

determining, by a power management engine, that a graphics processing system is operating above a graphics processing activity threshold;

preventing, by the power management engine in response to determining that the graphics processing system is operating above the graphics processing activity threshold and detecting the connection to the external power supply, a central processing system from entering a first subset of the plurality of different sleep states, wherein the central processing system is configured to communicate with the graphics processing system to cause the graphics processing system to render graphics while prevented from entering the first subset of the plurality of different sleep states;

determining, by the power management engine, that the graphics processing system is operating below the graphics processing activity threshold; and

allowing, by the power management engine in response to determining that the graphics processing system is operating below the graphics processing activity threshold, the central processing system to enter the first subset of the plurality of different sleep states.

13. The method of claim 12 , further comprising:

allowing, by the power management engine, the central processing system to enter a second subset of the plurality of different sleep states while preventing the central processing system from entering the first subset of the plurality of different sleep states; and

causing, by the power management engine, the central processing system to transition from the second subset of the plurality of different sleep states to an operating state in order to communicate with the graphics processing system to cause the graphics processing system to render graphics.

14. The method of claim 13 , wherein the second subset of the plurality of different sleep states is a C1 sleep state defined by the Advanced Configuration and Power Interface (ACPI) standard.

15. The method of claim 13 , wherein the second subset of the plurality of different sleep states are associated with a latency variability that is lower than the first subset of the plurality of different sleep states.

16. The method of claim 12 , wherein the determining that the graphics processing system is operating above the graphics processing activity threshold includes at least one of:

determining that a graphics processing system temperature of the graphics processing system is above a temperature threshold;

determining that a graphics processing system power consumption of the graphics processing system is above a power consumption threshold; and

determining that a graphics processing system utilization of the graphics processing system is above a utilization threshold.

17. The method of claim 12 , wherein the determining that the graphics processing system is operating above the graphics processing activity threshold includes determining that the graphics processing system has rendered graphics within a time period, and wherein the determining that the graphics processing system is operating below the graphics processing activity threshold includes determining that the graphics processing system has not rendered graphics within the time period.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (045482/0131) Recorded May 20, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO WYSE TECHNOLOGY L.L.C.)
Reel/Frame 061749/0924 →
RELEASE OF SECURITY INTEREST AT REEL 045482 FRAME 0395 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; WYSE TECHNOLOGY L.L.C.
Reel/Frame 058298/0314 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY AGREEMENT (CREDIT) Recorded Mar 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; WYSE TECHNOLOGY L.L.C.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 045482/0395 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Mar 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; WYSE TECHNOLOGY L.L.C.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 045482/0131 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 26, 2018
From: SHOWS, THOMAS ALEXANDER; WU, CHUNG SHOU
To: DELL PRODUCTS L.P.
Reel/Frame 044744/0099 →
Continuity (1)
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