System and method for low latency communication
A system and method for low latency and higher bandwidth communication between a central processing unit (CPU) and an accelerator is disclosed. When the CPU updates a copy of data stored at a shared memory, the CPU also sends an “invalidate” command to a cache coherent interconnect (CCI). The CCI forwards the invalidate command to a dedicated cache register (DCR). The DCR marks its copy of the data as “out-of-date” and requests an up-to-date copy of the data from the CCI. The CCI then retrieves up-to-date data for the DCR. When the DCR receives the up-to-date data from the CCI, the DCR replaces the out-of-date data with the up-to-date data, and marks the up-to-date data with the status of “valid.” The DCR can then provide data to an accelerator with a status of “out-of-date” or “valid.”
1. A system, comprising:
a cache coherent interconnect (CCI);
a central processing unit (CPU) coupled to the CCI, wherein the CPU comprises a plurality of CPU cores;
a shared memory coupled to the CCI, wherein the shared memory is usable by any of the plurality of CPU cores;
a caching agent coupled to the CCI, wherein the caching agent comprises a cache and a dedicated cache register (DCR), wherein the DCR is configured to store a copy of a data value that was stored in the shared memory;
a DCR bus coupled to the DCR; and
an accelerator coupled to the DCR via the DCR bus.
2. The system of claim 1 , wherein the DCR comprises a non-transitory data storage and a processor.
3. The system of claim 2 , wherein the non-transitory data storage stores:
shared data; and
instructions that when executed by the processor cause the DCR to perform operations comprising:
determining that the shared data is out-of-date;
retrieving up-to-date shared data; and
providing the up-to-date shared data to the accelerator.
4. The system of claim 3 , wherein determining that the shared data is out-of-date comprises receiving an indication via the CCI that the shared data is out-of-date.
5. The system of claim 3 , wherein the operations further comprise:
marking the shared data as out-of-date.
6. The system of claim 5 , wherein the operations further comprise:
informing the accelerator that the shared data copy is out-of-date after marking the shared data copy as out-of-date.
7. The system of claim 3 , wherein retrieving up-to-date shared data comprises:
sending a request for an up-to-date copy of the shared data via the CCI; and
receiving the up-to-date copy of the shared data via the CCI.
8. The system of claim 3 , wherein the operations further comprise:
replacing the out-of-date shared data with the up-to-date shared data.
9. The system of claim 3 , wherein the operations further comprise:
marking the up-to-date shared data as valid.
10. The system of claim 3 , wherein the shared data includes one or more data entries, wherein each data entry has a corresponding data value and a data state.
11. The system of claim 10 , wherein the data state can be selected from the group consisting of valid, invalid, and out-of-date.
12. The system of claim 1 , wherein the DCR is configured to store an address indicative of where the data value was stored in the shared memory.
13. The system of claim 1 , wherein the DCR is configured to store a status of the data value, wherein the status of the data value indicates whether the data value is out-of-date.
14. The system of claim 1 , wherein the data value is a command queue pointer.
15. The system of claim 1 , wherein the caching agent comprises a plurality of DCRs.