IP Library Granted Patent US 10,489,084
Granted Patent B2
US 10,489,084 · App. 15/887,328 · Granted Nov 26, 2019

Method and system for reclaiming memory using read counts

Inventors: Byeong-Gyu Park (Gyeonggi-do, KR); Seung-Gu Ji (Seoul, KR)
Assignee: SK hynix Inc.
G06F3/0659G06F3/0604G06F3/0616G06F3/0619G06F3/0658G06F3/0673G06F3/0679G06F12/00
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Quick Facts
Patent No.
US 10,489,084
App. No.
15/887,328
Granted
Nov 26, 2019
Kind
B2
Abstract

A method of a read reclaim operation of a memory controller, the method comprising: updating, during each read operation for a read operation unit among one or more read operation units included in each of a plurality of memory blocks, a first index for a corresponding one among the plurality of memory blocks and a second index for the read operation unit; detecting a warming block, the first index of which is over a first threshold among the plurality of memory blocks; detecting a read-hot-spot, the updated second index of which is over a second threshold among the read operation units included in the warming block; and performing the read reclaim operation on the read-hot-spot.

Claims (34)

1. A method of a read reclaim operation of a memory controller, the method comprising:

updating, during a read operation for a read operation unit included in a memory block, a first index for the memory block and a second index for the read operation unit;

determining the memory block as a warming block when the updated first index is over a first threshold;

determining the read operation unit as a read-hot-spot when the memory block is the warming block and the updated second index is over a second threshold; and

programming data of the read-hot-spot into another memory block.

2. The method of claim 1 , wherein the first index is a remaining value obtained by subtracting an average read count value of a plurality of memory blocks of a memory device controlled by the memory controller from a read count value of the memory block, in which the read operation is performed for the read operation units.

3. The method of claim 2 , wherein the average read count value of the plurality of memory blocks is obtained by dividing sum of the read count values of the plurality of memory blocks by a number of the plurality of memory blocks.

4. The method of claim 1 , wherein the second index is a read count, which is increased according to the read operation performed in the read operation unit.

5. The method of claim 1 , wherein the read operation unit is the same as or smaller than a page of the memory block.

6. The method of claim 1 , wherein the first index is an increased amount of a read count value of the memory block for a predetermined time period.

7. The method of claim 6 , wherein the predetermined time period is a time interval, in which an accumulated amount of the read count value of the memory block is over a predetermined value.

8. A controller comprising:

a counter suitable for updating, during a read operation for a read operation unit included in a memory block, a first index for the memory block and a second index for the read operation unit;

a detector suitable for determining the memory block as a warming block when the updated first index is over a first threshold, and determining the read operation unit as a read-hot-spot when the memory block is the warming block and the updated second index is over a second threshold,

wherein the controller programs data of the read-hot-spot into another memory block.

9. The controller of claim 8 , wherein the first index is a remaining value obtained by subtracting an average read count value of a plurality of memory blocks of a memory device controlled by the controller from a read count value of the memory block, in which the read operation is performed for the read operation units.

10. The controller of claim 9 , wherein the average read count value of the plurality of memory blocks is obtained by dividing sum of the read count values of the plurality of memory blocks by a number of the plurality of memory blocks.

11. The controller of claim 8 , wherein the second index is a read count, which is increased according to the read operation performed in the read operation unit.

12. The controller of claim 8 , wherein the read operation unit is the same as or smaller than a page of the memory block.

13. The controller of claim 8 , wherein the first index is an increased amount of a read count value of the memory block for a predetermined time period.

14. The controller of claim 13 , wherein the predetermined time period is a time interval, in which an accumulated amount of the read count value of the memory block is over a predetermined value.

15. A semiconductor memory system comprising:

a semiconductor memory device; and

a controller,

wherein the controller includes:

a counter suitable for updating, during a read operation for a read operation unit included in, a first index for the memory block and a second index for the read operation unit;

a detector suitable for determining the memory block as a warming block when the updated first index is over a first threshold, and determining the read operation unit as a read-hot-spot when the memory block is the warming block and the updated second index is over a second threshold,

wherein the controller programs data of the read-hot-spot into another memory block.

16. The semiconductor memory system of claim 15 , wherein the first index is a remaining value obtained by subtracting an average read count value of a plurality of memory blocks of the semiconductor memory device from a read count value of the memory block, in which the read operation is performed to the read operation units.

17. The semiconductor memory system of claim 16 , wherein the average read count value of the plurality of memory blocks is obtained by dividing sum of the read count values of the plurality of memory blocks by a number of the plurality of memory blocks.

18. The semiconductor memory system of claim 15 , wherein the second index is a read count, which is increased according to the read operation performed in the read operation unit.

19. The semiconductor memory system of claim 15 , wherein the read operation unit is the same as or smaller than a page of the memory block.

20. The semiconductor memory system of claim 15 , wherein the first index is an increased amount of a read count value of the memory block for a predetermined time period, and

wherein the predetermined time period is a time interval, in which an accumulated amount of the read count value of the memory block is over a predetermined value.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067335/0246 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 2, 2018
From: PARK, BYEONG-GYU; JI, SEUNG-GU
To: SK HYNIX INC.
Reel/Frame 045243/0170 →
Priority Claims (1)
KR 10-2017-0081084 · Jun 27, 2017 · national
Continuity (1)
Related Publication 20180373460A1 · Dec 27, 2018