Charge/discharge control circuit and battery device
A charge/discharge control circuit includes: a first power supply terminal connected to a first electrode of a secondary battery; a second power supply terminal connected to a second electrode of the secondary battery; a control circuit configured to control charge/discharge of the secondary battery; and a power-down release pulse generation circuit connected to the power-down release terminal, the power-down release pulse generation circuit being configured to supply, in a power-down state of the charge/discharge control circuit, a power-down release pulse at least to the control circuit in response to an input of a power-down release signal to the power-down release terminal to release the power-down state.
1. A charge/discharge control circuit, comprising:
a first power supply terminal connected to a first electrode of a secondary battery;
a second power supply terminal connected to a second electrode of the secondary battery;
a power-down release terminal;
a control circuit configured to control charge/discharge of the secondary battery; and
a power-down release pulse generation circuit connected to the power-down release terminal,
wherein the power-down release pulse generation circuit is configured to, while the charge/discharge control circuit is in a power-down state:
receive an input of a power-down release signal on the power-down release terminal, the power-down release signal to release the power-down state of the charge/discharge control circuit; and
supply a power-down release pulse at least to the control circuit in response to receiving the power-down release signal; and
wherein the control circuit is configured to turn on a discharge control transistor to supply current from the secondary battery to a load in response to receiving the power-down release pulse.
2. The charge/discharge control circuit according to claim 1 , further comprising a forced power-down terminal to which a forced power-down signal is input,
wherein the forced power-down terminal is also used as the power-down release terminal.
3. The charge/discharge control circuit according to claim 1 , further comprising a delay circuit between the power-down release terminal and the power-down release pulse generation circuit, the delay circuit being configured to delay the power-down release signal for a predetermined period of time.
4. The charge/discharge control circuit according to claim 2 , further comprising a delay circuit between the power-down release terminal and the power-down release pulse generation circuit, the delay circuit being configured to delay the power-down release signal for a predetermined period of time.
5. A battery device, comprising:
the charge/discharge control circuit of claim 1 ;
the secondary battery;
a charge/discharge path connected to the secondary battery; and
a charge control transistor and the discharge control transistor arranged in the charge/discharge path.