In-circuit supply transient scope
View Patent ↗Temporal history of voltage supply level enveloping high-speed transient events is provided by circuitry on the same chip or in the same multi-chip module as the processor cores. In some embodiments supply voltage to the processor cores is compared to predetermined or programmable thresholds, and the result of the comparisons are stored for use by a host processor.
1. A supply transient scope (STS) block for monitoring a supply voltage provided to a load, comprising:
a sensor array configured to receive a signal indicative of the supply voltage provided to the load, to compare the signal indicative of the supply voltage to each of a plurality of reference voltages, and to generate indications of the supply voltage based on results of the comparisons;
a memory including a plurality of memory elements configured to store at least some of the indications of the supply voltage generated by the sensor array based on a clock cycle; and
control circuitry configured to generate a stop signal, and wherein the memory is configured to cease writing the at least some indications of the supply voltage to the plurality of memory elements upon receipt of the stop signal; and
wherein the control circuitry is configured to generate the stop signal a predetermined plurality of clock cycles after one of the indications of the supply voltage generated by the sensor array indicates the supply voltage is below a predetermined value.
2. The STS block of claim 1 wherein the sensor array includes a plurality of comparators, each of the plurality of comparators configured to compare the signal indicative of the supply voltage to one of the plurality of reference voltages.
3. The STS block of claim 2 further comprising:
a threshold voltage generator configured to generate the plurality of reference voltages based on a target voltage.
4. The STS block of claim 2 wherein each of the plurality of comparators are clocked comparators clocked at a clock rate comparable to a clock rate of the load.
5. The STS block of claim 3 wherein the threshold voltage generator is configured to generate the plurality of reference voltages based on a bandgap reference voltage and the target voltage.
6. The STS block of 1 wherein the plurality of memory elements include a sufficient number of memory elements to store at least two results from each of comparisons of the signal indicative of the supply voltage to the plurality of reference voltages.
7. The STS block of claim 1 wherein the memory is a circular buffer.
8. A method for generating indications of a supply voltage provided to a load comprising:
receiving a signal indicative of the supply voltage provided to the load;
repeatedly over time, comparing the supply voltage to each of a plurality of reference voltages; and
temporarily storing in memory at least some results of the comparing of the supply voltage to each of the plurality of reference voltages, the stored results including at least a plurality of results for each of the plurality of reference voltages; and
halting writing of the at least some of the results a predetermined plurality of clock cycles after a one of the results indicates the supply voltage is below a predetermined value.
9. The method of claim 8 further comprising:
receiving a target voltage signal; and
generating the plurality of reference voltages based on the target voltage signal.
10. The method of claim 9 further comprising:
receiving bandgap reference voltage signal; and
wherein the plurality of reference voltages are generated based upon the target voltage signal and the bandgap reference voltage signal.
11. The method of claim 8 wherein the comparisons are performed at a clock rate comparable to a clock rate of the load.
12. The method of claim 8 further comprising:
waiting a predetermined number of clock cycles to allow a host processor to read the memory; and
re-starting the storing in memory of the at least some of the results in response to the predetermined number of clock cycles having passed.
13. A system that provides an indication of a supply voltage supplied to a load comprising:
a voltage regulator that provides the supply voltage to the load; and
a supply transient scope (STS) block coupled to the voltage regulator in series with the load, the STS block comprising:
a sensor array configured to receive an indication of the supply voltage provided to the load and to compare the indication of the supply voltage to each of a plurality of reference voltages;
a memory including a plurality of memory elements configured to temporarily store a plurality of results for each of the comparisons of the indication of the supply voltage to each of the plurality of the reference voltages generated by the sensor array; and
control circuitry configured to at least temporarily halt the memory from storing further results of the comparisons a predetermined value of clock cycles after a one of the sensors of the sensor array indicated that the supply voltage is below a predetermined value.
14. The system of claim 13 wherein the load and the STS block are on the same chip.
15. The system of claim 13 wherein the load and the STS block are in the same chip module.