Peripheral disconnection switch system and method
A peripheral disconnection switch system and method are provided. The system comprises at least one peripheral connected to a processor, and a hardware switch connected to the at least one peripheral. The system is operable such that engaging the hardware switch disables the at least one peripheral.
1. A system, comprising:
a processor;
at least one peripheral connected to the processor;
a hardware switch situated between the processor and the at least one peripheral; and
a delay circuit that implements a time delay to cause the at least one peripheral to be disabled after the time delay when the hardware switch is engaged to disconnect a circuit line between the at least one peripheral and the processor.
2. The system of claim 1 , wherein the hardware switch causes the disconnect of the circuit line between the at least one peripheral and the processor.
3. The system of claim 1 , wherein the hardware switch is further connected to a general-purpose input/output (GPIO), the GPIO being configured such that the GPIO generates an interrupt.
4. The system of claim 1 , wherein the at least one peripheral includes at least one of a speaker, an earpiece, a headphone, a microphone, a camera, a global navigation satellite system (GNSS), a Global Positioning System (GPS), a cellular RF, wi-fi functionality, and bluetooth functionality.
5. The system of claim 1 , wherein the time delay includes an output falling edge occurring after an input falling edge.
6. The system of claim 1 , wherein the hardware switch is connected to an analog switch.
7. The system of claim 1 , wherein the hardware switch is added to a reset line associated with the at least one peripheral.
8. The system of claim 1 , wherein the engagement terminates one or more signals from the processor to the at least one peripheral.
9. The system of claim 8 , wherein the termination of the one or more signals is proper.
10. The system of claim 1 , wherein the at least one peripheral remains operational even after the engagement.
11. The system of claim 1 , wherein the hardware switch is a user operable switch.
12. The system of claim 1 , wherein responsive to engagement of the hardware switch, the system causes the processor to direct software to switch off the peripherals in the software during the time delay, and wherein after the time delay one or more physical signal lines to the at least one peripheral are disconnected.
13. A method, comprising:
connecting at least one peripheral to a processor;
connecting a hardware switch between the processor and the at least one peripheral; and
engaging the hardware switch to disconnect a circuit line between the at least one peripheral and the processor, wherein engaging the hardware switch causes the at least one peripheral to be disabled after a time delay, and wherein the time delay is implemented using a delay circuit.
14. The method of claim 13 , wherein the hardware switch causes the disconnect of the circuit line between the at least one peripheral and the processor.
15. The method of claim 13 , wherein the hardware switch is further connected to a general-purpose input/output (GPIO), the GPIO being configured such that the GPIO generates an interrupt.
16. The method of claim 13 , wherein the at least one peripheral includes at least one of a speaker, an earpiece, a headphone, a microphone, a camera, a global navigation satellite system (GNSS), a Global Positioning System (GPS), a cellular RF, wi-fi functionality, and bluetooth functionality.
17. The method of claim 13 , wherein the time delay includes an output falling edge occurring after an input falling edge.
18. The method of claim 13 , wherein the hardware switch is connected to an analog switch.
19. The method of claim 13 , wherein the hardware switch is added to a reset line associated with the at least one peripheral.