IP Library Granted Patent US 10,229,053
Granted Patent B2
US 10,229,053 · App. 15/901,443 · Granted Mar 12, 2019

Controller, data storage device, and program product

Inventors: Kazuhiro Fukutomi (Tokyo, JP); Kenichiro Yoshii (Tokyo, JP); Shinichi Kanno (Tokyo, JP); Shigehiro Asano (Tokyo, JP)
Assignee: TOSHIBA MEMORY CORPORATION
G06F12/0246G06F3/061G06F3/064G06F3/0631G06F3/0659G06F3/0679G06F12/00G06F12/16G06F3/0608G06F3/0611G06F3/0638G06F3/0644G06F3/0665G06F3/0688G06F2212/1016G06F2212/214G06F2212/7202G06F2212/7205
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Quick Facts
Patent No.
US 10,229,053
App. No.
15/901,443
Granted
Mar 12, 2019
Kind
B2
Abstract

According to one embodiment, a write instructing unit instructs a data access unit to write, in a storage area of a data storage unit indicated by a first physical address, write object data, instructs a management information access unit to update address conversion information, and instructs a first access unit to update the first physical address. A compaction unit extracts a physical address of compaction object data, instructs the data access unit to read the compaction object data stored in a storage area of the data storage unit indicated by the physical address, instructs the data access unit to write the compaction object data in a storage area of the data storage unit indicated by a second physical address, instructs the management information access unit to update the address conversion information, and instructs a second access unit to update the second physical address.

Claims (28)

1. A memory system comprising:

a nonvolatile semiconductor memory comprising a plurality of blocks, the blocks including one or more first blocks, a plurality of second blocks which differ from the first blocks, and a third block, each of the blocks being a unit of an erase operation of the nonvolatile semiconductor memory; and

a controller circuit configured to receive a write request from a host device, the write request including a size of first data to be written to the memory system; wherein

the controller circuit is configured to perform a write operation of the first data to the first blocks in response to the write request;

the controller circuit is configured to perform a compaction operation of reallocating second data stored in the second blocks to the third block which stores no valid data and treating the second blocks as free blocks;

the controller circuit is configured to switch, while continuously performing one of the compaction operation and the write operation, the operation to the other of the compaction operation and the write operation.

2. The controller of claim 1 , wherein

the controller circuit switches the operation to the write operation, when receiving the write request from the host device while continuously performing the compaction operation.

3. The controller of claim 2 , wherein

the controller circuit restarts the compaction operation, upon completing the write operation after the switching.

4. The controller of claim 1 , wherein

the controller circuit switches between the compaction operation and the write operation in unit of a page.

5. The controller of claim 1 , wherein

the controller circuit starts the compaction operation when a number of non-used blocks is less than a predetermined threshold value.

6. The memory system of claim 1 , wherein

the controller circuit starts the compaction operation before receiving the write request from the host device.

7. A non-transitory computer readable medium including programmed instructions for a controller circuit of a memory system, the memory system comprising a nonvolatile semiconductor memory comprising a plurality of blocks, the blocks including one or more first blocks, a plurality of second blocks which differ from the first blocks, and a third block, each of the blocks being a unit of an erase operation of the nonvolatile semiconductor memory;

the programmed instructions causing the controller circuit to perform:

receiving a write request from a host device, the write request including a size of first data to be written to the memory system,

performing a write operation of the first data to the first blocks in response to the write request;

performing a compaction operation of reallocating second data stored in the second blocks to the third block which stores no valid data and treating the second blocks as free blocks;

switching, while continuously performing one of the compaction operation and the write operation, the operation to the other of the compaction operation and the write operation.

8. A method that is used for a controller circuit of a memory system, the memory system comprising a nonvolatile semiconductor memory comprising a plurality of blocks, the blocks including one or more first blocks, a plurality of second blocks which differ from the first blocks, and a third block, each of the blocks being a unit of an erase operation of the nonvolatile semiconductor memory;

the method comprising:

receiving a write request from a host device, the write request including a size of first data to be written to the memory system,

performing a write operation of the first data to the first blocks in response to the write request;

performing a compaction operation of reallocating second data stored in the second blocks to the third block which stores no valid data and treating the second blocks as free blocks;

switching, while continuously performing one of the compaction operation and the write operation, the operation to the other of the compaction operation and the write operation.

Assignments (3)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
Priority Claims (1)
JP 2010-063191 · Mar 18, 2010 · national
Continuity (4)
Continuation 15530151 · Dec 8, 2016
Continuation 13933804 · Jul 2, 2013
Continuation 12883796 · Sep 16, 2010
Related Publication 20180239698A1 · Aug 23, 2018
Cited By (1)
US 12,277,348