Wafer-scale testing of photonic integrated circuits using horizontal spot-size converters
Disclosed herein are methods, structures, and devices for wafer scale testing of photonic integrated circuits.
1. An apparatus comprising:
a wafer comprising a plurality of photonic integrated circuits;
a first photonic integrated circuit of the plurality of photonic integrated circuits comprising a test circuit;
a second photonic integrated circuit of the plurality of photonic integrated circuits adjacent the first photonic integrated circuit and comprising a horizontal spot-size converter, wherein the horizontal spot-size converter comprises an inverted taper;
wherein the test circuit is configured to test the second photonic integrated circuit via the horizontal spot-size converter.
2. The apparatus of claim 1 ,
wherein the second photonic integrated circuit comprises an intermediate waveguide optically coupled to the inverted taper;
wherein the inverted taper and the intermediate waveguide are made of different materials.
3. The apparatus of claim 1 , wherein the test circuit comprises a grating coupler.
4. The apparatus of claim 1 , wherein the test circuit comprises a polarization splitter.
5. The apparatus of claim 1 , wherein the horizontal spot-size converter is a first horizontal spot-size converter, and wherein the first photonic integrated circuit further comprises a second horizontal spot-size converter configured to optically couple the test circuit to the first horizontal spot-size converter.
6. The apparatus of claim 1 , wherein the wafer comprises silicon.
7. The apparatus of claim 1 , wherein the test circuit is configured to optically couple to the horizontal spot-size converter through a trench.
8. The apparatus of claim 7 , wherein the horizontal spot-size converter forms an angle with respect to a normal to the trench that is greater than zero.