Information handling system with reduced data loss in block mode
View Patent ↗An information handling system includes a non-volatile memory, a central processing unit, and a memory controller. The non-volatile memory is configured in a block translation table mode, and divided into a plurality of sectors. The central processing unit writes data to the non-volatile memory by sector. The memory controller detects a power loss in the information handling system, determines a memory address of a last successful write within the non-volatile memory, stores the memory address in an used portion of the non-volatile memory, and starts a save operation.
1. An information handling system comprising:
a non-volatile memory configured in a block translation table mode, the non-volatile memory being divided into a plurality of sectors;
a central processing unit to communicate with the non-volatile memory, the central processing unit to write data to the non-volatile memory by sector of the non-volatile memory; and
a memory controller to communicate with the central processing unit and with the non-volatile memory, the memory controller to detect a power loss in the information handling system, to determine a memory address of a last successful write within the non-volatile memory, to store the memory address in an unused portion of the non-volatile memory, to start a save operation including storing of the data assigned to addresses beyond the memory address to a backup memory; to determine whether the memory address of the last successful write is a multiple of a block window size, and if the memory address is not a multiple of the block window size, to move the memory address back to a location that is a multiple of the block window size prior to the memory address being stored in the unused portion of the non-volatile memory.
2. The information handling system of claim 1 , the memory controller to complete a write operation of current data into the backup memory.
3. The information handling system of claim 1 , the memory controller to determine the memory address of the last successful write from a block window aperture address in a block translation table of the non-volatile memory.
4. The information handling system of claim 1 , in response to a detection of a power restore operation, the memory controller to read the memory address from the unused portion of the non-volatile memory, to retrieve the respective address from the backup memory, and to store the data in respective locations of the non-volatile memory.
5. The information handling system of claim 4 , the memory controller to inform a user of a last extended restore in response to the data being stored in the respective locations.
6. The information handling system of claim 5 , wherein the memory controller to inform the user via a non-volatile dual in-line memory module firmware interface table.
7. A method comprising:
configuring a non-volatile memory of an information handling system in a block translation table mode;
dividing the non-volatile memory into a plurality of sectors;
performing write operations to write data to the non-volatile memory by sector;
detecting a power loss in the information handling system while the write operations are being performed;
determining a memory address of a last successful write within the non-volatile memory;
determining whether the memory address of the last successful write is a multiple of a block window size;
in response to the determination that the memory address is a multiple of the block window size, storing the memory address in an unused portion of the non-volatile memory;
starting a save operation in response to the memory address being stored in the unused portion; and
detecting a power restore operation, wherein in response to a detection of a power restore operation, the memory address is read from the unused portion of the non-volatile memory.
8. The method of claim 7 , further comprising:
completing a write operation of current data into a backup memory.
9. The method of claim 7 , further comprising:
reading a block window aperture address in a block translation table of the non-volatile memory to determine the memory address of the last successful write.
10. The method of claim 7 , further comprising:
if the memory address is not a multiple of the block window size, moving the memory address back to a location that is a multiple of the block window size prior to the memory address being stored in the unused portion of the non-volatile memory.
11. The method of claim 7 , further comprising:
retrieving the respective address from a backup memory; and
storing the data in respective locations of the non-volatile memory.
12. The method of claim 11 , further comprising:
informing a user of a last extended restore in response to the data being stored in the respective locations.
13. The method of claim 12 , wherein the memory controller to inform the user via a non-volatile dual in-line memory module firmware interface table.
14. A method comprising:
configuring a non-volatile memory of an information handling system in a block translation table mode;
dividing the non-volatile memory into a plurality of sectors;
performing write operations to write data to the non-volatile memory by sector of the non-volatile memory;
detecting a power loss in the information handling system while the write operations are being performed;
determining a memory address of a last successful write within the non-volatile memory;
storing the memory address in an unused portion of the non-volatile memory;
detecting a power restore operation;
in response to a detected power restore operation, reading the memory address of the last successful write from the non-volatile memory;
retrieving the respective address from a backup memory;
storing the data in respective locations of the non-volatile memory;
retrieving data within the non-volatile memory in a memory region higher than the memory address of the last successful write; and
storing the retrieved data in the non-volatile memory beginning with the memory address of the last successful write.
15. The method of claim 14 , further comprising:
storing data in a cache of the processor into the backup memory.
16. The method of claim 14 , further comprising:
reading a block window aperture address in a block translation table of the non-volatile memory to determine the memory address of the last successful write.
17. The method of claim 14 , further comprising:
determining whether the memory address of the last successful write is a multiple of a block window size; and
if the memory address is not a multiple of the block window size, moving the memory address back to a location that is a multiple of the block window size prior to the memory address being stored in the unused portion of the non-volatile memory.
18. The method of claim 14 , further comprising:
informing a user of a last extended restore in response to the data being stored in the respective locations.