Storage management system and method
View Patent ↗A method, computer program product, and computing system for determining a maximum quantity of unit write operations serviceable by a data bus coupled to a memory system. A first data stream is received for writing data to the memory system. A first unit write operation is assigned to the first data stream. One or more supplemental unit write operations are assigned to the first data stream as needed provided that the one or more supplemental unit write operations do not result in the total unit write operations exceeding the maximum quantity of unit write operations.
1. A computer-implemented method, executed on a computing device, comprising:
determining a maximum quantity of unit write operations serviceable by a data bus coupled to a memory system;
receiving a first data stream for writing data to the memory system;
assigning a first unit write operation to the first data stream, wherein assigning the first unit write operation to the first data stream includes writing data of the first data stream to the memory system; and
assigning one or more supplemental unit write operations to the first data stream when writing the data of the first data stream to the memory system is taking longer than a threshold amount of time provided that the one or more supplemental unit write operations do not result in the total unit write operations exceeding the maximum quantity of unit write operations.
2. The computer-implemented method of claim 1 further comprising:
writing the data to data blocks defined within the first unit write operation in a round-robin fashion.
3. The computer-implemented method of claim 1 wherein the unit write operations are grid block unit write operations.
4. The computer-implemented method of claim 1 wherein:
the data bus is a PCIe data bus; and
the memory system is an SSD memory system.
5. The computer-implemented method of claim 1 further comprising:
receiving an additional data stream for writing data to the memory system.
6. The computer-implemented method of claim 5 wherein further comprising:
assigning one or more additional unit write operations to the additional data stream as needed provided that the one or more additional unit write operations do not result in the total unit write operations exceeding the maximum quantity of unit write operations.
7. The computer-implemented method of claim 5 wherein assigning one or more supplemental unit write operations to the first data stream includes:
assigning one or more supplemental unit write operations to the first data stream if a busy condition is sensed with respect to the first unit write operation.
8. A computer program product residing on a non-transitory computer readable medium having a plurality of instructions stored thereon which, when executed by a processor, cause the processor to perform operations comprising:
determining a maximum quantity of unit write operations serviceable by a data bus coupled to a memory system;
receiving a first data stream for writing data to the memory system;
assigning a first unit write operation to the first data stream, wherein assigning the first unit write operation to the first data stream includes writing data of the first data stream to the memory system; and
assigning one or more supplemental unit write operations to the first data stream when writing the data of the first data stream to the memory system is taking longer than a threshold amount of time provided that the one or more supplemental unit write operations do not result in the total unit write operations exceeding the maximum quantity of unit write operations.
9. The computer program product of claim 8 further comprising:
writing the data to data blocks defined within the first unit write operation in a round-robin fashion.
10. The computer program product of claim 8 wherein the unit write operation is a grid block unit write operation.
11. The computer program product of claim 8 wherein:
the data bus is a PCIe data bus; and
the memory system is an SSD memory system.
12. The computer program product of claim 8 further comprising:
receiving an additional data stream for writing data to the memory system.
13. The computer program product of claim 12 further comprising:
assigning one or more additional unit write operations to the additional data stream as needed provided that the one or more additional unit write operations do not result in the total unit write operations exceeding the maximum quantity of unit write operations.
14. The computer program product of claim 12 wherein assigning one or more supplemental unit write operations to the first data stream includes:
assigning one or more supplemental unit write operations to the first data stream if a busy condition is sensed with respect to the first unit write operation.
15. A computing system comprising:
a memory; and
a processor configured to determine a maximum quantity of unit write operations serviceable by a data bus coupled to a memory system, the processor further configured to receive a first data stream for writing data to the memory system, the processor further configured to assign a first unit write operation to the first data stream, wherein assigning the first unit write operation to the first data stream includes writing data of the first data stream to the memory system, and the processor further configured to assign one or more supplemental unit write operations to the first data stream when writing the data of the first data stream to the memory system is taking longer than a threshold amount of time provided that the one or more supplemental unit write operations do not result in the total unit write operations exceeding the maximum quantity of unit write operations.
16. The computing system of claim 15 wherein the processor is further configured to write the data to data blocks defined within the first unit write operation in a round-robin fashion.
17. The computing system of claim 15 wherein the unit write operation is a grid block unit write operation.
18. The computing system of claim 15 wherein:
the data bus is a PCIe data bus; and
the memory system is an SSD memory system.
19. The computing system of claim 15 wherein the processor is further configured to receive an additional data stream for writing data to the memory system.
20. The computing system of claim 19 wherein the processor is further configured to assign one or more additional unit write operations to the additional data stream as needed provided that the one or more additional unit write operations do not result in the total unit write operations exceeding the maximum quantity of unit write operations.
21. The computing system of claim 19 wherein assigning, via the processor, one or more supplemental unit write operations to the first data stream includes:
assigning one or more supplemental unit write operations to the first data stream if a busy condition is sensed with respect to the first unit write operation.