Power management in a configurable bus
View Patent ↗A system includes a bus and a component interconnected via the bus. The component may enter a sleep mode during a period of no data transmission involving the component.
1. A system, comprising:
a bus;
a first component to receive data, via the bus, the first component comprising a buffer to store the data, the first component consuming the data at a data consumption rate to empty the buffer; and
a second component comprising logic configured to:
determine a first duration for a burst transmission based on a size of the buffer of the first component;
send the data to the first component via the burst transmission for the determined first duration; and
enter the second component into a sleep mode for a second duration, the second duration based on the first duration and the data consumption rate.
2. The system of claim 1 , wherein a data rate of the burst transmission is associated with a first clock frequency and the data consumption rate is associated with a second clock frequency.
3. The system of claim 1 , wherein the first and second durations comprise set values.
4. The system of claim 1 , wherein the logic is configured to determine the first duration to avoid an amount of data stored by the buffer reaching the size of the buffer due to the burst transmission.
5. The system of claim 1 , wherein the logic is further configured to end the second duration in response to an indication from the first component that the buffer has emptied to a predetermined level.
6. The system of claim 5 , wherein the logic is further configured to initiate a waking process to cause the second component to enter a wake up mode, in response to the indication.
7. The system of claim 1 , wherein the logic is further configured to initiate a waking process to cause the second component to enter a wake up mode, after the second duration.
8. A method, comprising:
receiving data, at a first component, via a bus, the first component comprising a buffer to store the data, the first component consuming the data at a data consumption rate to empty the buffer;
determining, by a second component, a first duration for a burst transmission based on a size of the buffer of the first component;
sending, by the second component, the data to the first component via the burst transmission for the determined first duration; and
entering the second component into a sleep mode for a second duration, the second duration based on the first duration and the data consumption rate.
9. The method of claim 8 , wherein a data rate of the burst transmission is associated with a first clock frequency and the data consumption rate is associated with a second clock frequency.
10. The method of claim 8 , wherein the first and second durations comprise set values.
11. The method of claim 8 , wherein determining, by the second component, the first duration includes, determining, by the second component, the first duration to avoid the burst transmission when an amount of data stored by the buffer reaches the size of the buffer.
12. The method of claim 8 , further comprising ending the second duration in response to an indication from the first component that the buffer has emptied to a predetermined level.
13. The method of claim 12 , further comprising initiating a waking process to cause the second component to enter a wake up mode, in response to the indication.
14. The method of claim 8 , further comprising initiating a waking process to cause the second component to enter a wake up mode, after the second duration.
15. An apparatus comprising:
a machine-readable medium other than a transitory signal for storing instructions; and
circuitry configured to execute the instructions to:
determine a first duration for a burst transmission based on a size of a buffer of a first device, the buffer to store data from the circuitry, the first device consuming the data at a data consumption rate to empty the buffer;
send, to the first device, the data via the burst transmission for the determined first duration; and
enter the circuitry into a sleep mode for a second duration, the second duration based on the first duration and the data consumption rate.
16. The apparatus of claim 15 , wherein a data rate of the burst transmission is associated with a first clock frequency and the data consumption rate is associated with a second clock frequency.
17. The apparatus of claim 15 , wherein the first and second durations comprise set values.
18. The apparatus of claim 15 , wherein the instructions are executed to determine the first duration to avoid the burst transmission when an amount of data stored by the buffer reaches the size of the buffer.
19. The apparatus of claim 15 , wherein the instructions are executed to end the second duration in response to an indication from the first device that the buffer has emptied to a predetermined level.
20. The apparatus of claim 19 , wherein the instructions are executed to initiate a waking process to cause the circuitry to enter a wake up mode, in response to the indication.