Overhang model for reducing passivation stress and method for producing the same
A method for forming a sensor with increased overhang to prevent passivation stress fractures is provided. Embodiments include forming a first passivation layer over a dielectric layer patterned over a first top metal layer of a logic region of a sensor and a second top metal layer of an array region of the sensor; planarizing the first passivation layer and the dielectric layer to form a level surface above the first top metal layer and the second top metal layer; etching the dielectric layer to form a pad opening in the array region of the sensor based on a predetermined overhang value, the pad opening exposing a portion of the surface of the second top metal layer; and forming a second passivation layer over the level surface and the pad opening in the array region.
1. A device comprising:
a first top metal layer within a logic region of a sensor;
a second top metal layer within an array region of the sensor;
a dielectric layer over the logic region and the array region, height of the dielectric layer over the first and second top metal layers greater than the height of the dielectric layer in-between the first and second top metal layers;
a first passivation layer over the dielectric layer, the first passivation layer being in-between the first and second top metal layers, and a height of the first passivation layer being level with the height of the dielectric layer over the first and second top metal layers;
a pad opening in the logic region of the sensor with dimensions based on a predetermined overhang value, the pad opening exposing the first op metal layer;
a pad opening in the array region of the sensor with dimensions based on the predetermined overhang value; and
a second passivation layer over the dielectric layer, the first passivation layer and the pad opening in the array region of the sensor.
2. The device according to claim 1 , further comprising:
a via connected to a bottom surface of the first top metal layer, the via interconnecting the sensor to a logic device; and
a via connected to a bottom surface of the second top metal layer, the via interconnecting the sensor to an array,
wherein the dielectric layer is over the via, and wherein the dielectric layer comprises of high-density plasma (HDP) oxide, silicon or doped silicon-based low-K dielectric.
3. The device according to claim 1 , further comprising:
an etch mask over a portion of the dielectric layer and the first passivation layer,
wherein h portion is based on the dimensions of the pad opening in the array region of the sensor.
4. The device according to claim 1 , further comprising:
an etch mask over a portion of the second passivation layer,
wherein the portion is based on the dimensions of the pad opening in the logic region of the sensor.
5. The device according to claim 1 , wherein the predetermined overhang value is a measure of overlap between the second top metal layer and the second passivation layer from the pad opening in the array region.
6. The device according to claim 1 , wherein the predetermined overhang value is a measure of overlap between the first top me a layer and the second passivation layer from the pad opening in the logic region.
7. The device according to claim 1 , wherein the first passivation layer comprises of tetraethoxysilane (TEOS) and the second passivation layer comprises of HDP oxide and nitride.