IP Library Granted Patent US 10,579,471
Granted Patent B2
US 10,579,471 · App. 15/911,011 · Granted Mar 3, 2020

Storage device and error correction method for storage device

Inventors: Chihoko Shigeta (Kunitachi Tokyo, JP); Yoshihisa Kojima (Kawasaki Kanagawa, JP)
Assignee: TOSHIBA MEMORY CORPORATION
G06F11/1048G06F3/0614G06F11/073G06F11/0751G06F11/08G06F11/1004G06F11/1068G06F12/0246G06F12/1027G06F2212/1032G06F2212/7201G06F2212/7205G11C29/04G11C29/52G11C2029/0411
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Quick Facts
Patent No.
US 10,579,471
App. No.
15/911,011
Granted
Mar 3, 2020
Kind
B2
Abstract

A storage device includes a non-volatile memory and a control circuit that reads data in units of cluster, and erase data in units of logical block which includes a plurality of clusters. Data in each cluster includes a first error correction code and each cluster is arranged in at least one error correction group, each including clusters and a second error correction code. The control circuit performs a refresh operation in units of cluster such that refresh target data in a cluster of a first logical block is moved to a cluster of a second logical block. A first error correction group related to the refresh target data includes the cluster of the first logical block before the moving, and the first error correction group related to the refresh target data includes a cluster of the first logical block and a cluster of the second logical block after the moving.

Claims (43)

1. A storage device comprising:

a non-volatile memory; and

a control circuit configured to store data in the non-volatile memory, read the data from the non-volatile memory in units of cluster, and erase data in units of logical block which includes a plurality of clusters, wherein data in each cluster includes a first error correction code and each cluster is arranged in at least one of a plurality of error correction groups, each of the error correction groups including a plurality of clusters and a second error correction code, wherein

the control circuit is configured to perform a refresh operation in units of cluster such that refresh target data in a first cluster of a first logical block is moved to a second cluster of a second logical block,

a first error correction group related to the refresh target data includes the first cluster of the first logical block before the moving, and

the first error correction group related to the refresh target data includes at least a cluster of the first logical block and a cluster of the second logical block after the moving.

2. The storage device according to claim 1 , wherein

in response to a read request targeting data in a cluster of the first error correction group, the control circuit performs a read operation on the cluster and performs error correction on the data read from the cluster, and

the error correction includes a first error correction using a first error correction code included in the data read from the cluster and, if the first error correction fails, further includes a second error correction using a second error correction code of the first error correction group.

3. The storage device according to claim 2 , wherein the second error correction includes reading data and the second error correction code from clusters of the first logical block and at least the second cluster of the second logical block.

4. The storage device according to claim 1 , wherein the control circuit is further configured to perform a refresh operation in units of logical block such that all valid data stored in a target logical block are relocated into a write destination logical block.

5. The storage device according to claim 4 , wherein

after said all valid data stored in the target logical block are relocated into the write destination logical block, the control circuit determines whether the target logical block contains any cluster that stores data moved from a cluster of another logical block that has not been released yet, and releases or does not release the target logical block based on the determination.

6. The storage device according to claim 1 , wherein the control circuit maintains an address translation table and a correction map, and upon performing the refresh operation in units of cluster, does not update an entry in the address translation table corresponding to a logical address of the refresh target data, and updates an entry in the correction map.

7. The storage device according to claim 1 , wherein the control circuit maintains an address translation table and a correction map, and upon performing the refresh operation in units of cluster, updates the correction map so that an entry corresponding to the first cluster of the first error correction group in the first logical block is associated with the second cluster of the second logical block.

8. The storage device according to claim 7 , wherein

the control circuit maintains a read counter for each of a plurality of physical blocks of the nonvolatile memory, and

the control circuit performs the refresh operation in units of cluster on each of a plurality of clusters of a physical block when a read count of the physical block exceeds a threshold number.

9. A method of controlling a storage device including a non-volatile memory;

and a control circuit configured to store data in the non-volatile memory,

read the data from the non-volatile memory in units of cluster, and erase data in units of logical block which includes a plurality of clusters, wherein data in each cluster includes a first error correction code and each cluster is arranged in at least one of a plurality of error correction groups, each of the error correction groups including a plurality of clusters and a second error correction code, said method comprising:

performing a refresh operation in units of cluster such that refresh target data in a first cluster of a first logical block is moved to a second cluster of a second logical block, wherein

a first error correction group related to the refresh target data includes the first cluster of the first logical block before the moving, and

the first error correction group of the refresh target data includes at least a cluster of the first logical block and a cluster of the second logical block after the moving.

10. The method according to claim 9 , further comprising:

in response to a read request targeting data in a cluster of the first error correction group, performing a read operation on the cluster; and

performing error correction on the data read from the cluster,

wherein the error correction includes a first error correction using a first error correction code included in the data read from the cluster and, if the first error correction fails, further includes a second error correction using a second error correction code of the first error correction group.

11. The method according to claim 10 , wherein the second error correction includes reading data and the second error correction code from clusters of the first logical block and at least the second cluster of the second logical block.

12. The method according to claim 9 , further comprising:

performing a refresh operation in units of logical block such that all valid data stored in a target logical block are relocated into a write destination logical block.

13. The method according to claim 12 , further comprising:

after said all valid data stored in the target logical block are relocated into the write destination logical block, determining whether the target logical block contains any cluster that stores data moved from a cluster of another logical block; and

releasing or not releasing the target logical block based on the determination.

14. The method according to claim 9 , further comprising:

maintaining an address translation table and a correction map; and

upon performing the refresh operation in units of cluster, updating an entry in the correction map while not updating an entry in the address translation table corresponding to a logical address of the refresh target data.

15. The method according to claim 9 , further comprising:

maintaining an address translation table and a correction map; and

upon performing the refresh operation in units of cluster, updating the correction map so that an entry corresponding to the first cluster of the first error correction group in the first logical block is associated with the second cluster of the second logical block.

16. The method according to claim 15 , further comprising:

maintaining a read count for each of a plurality of physical blocks of the nonvolatile memory; and

performing a refresh operation in units of cluster on each of a plurality of clusters of a physical block when a read count of the physical block exceeds a threshold number.

Assignments (4)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2018
From: SHIGETA, CHIHOKO; KOJIMA, YOSHIHISA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 045794/0949 →
Continuity (2)
Provisional Application 62465915 · Mar 2, 2017
Related Publication 20180253347A1 · Sep 6, 2018