IP Library Granted Patent US 10,579,300
Granted Patent B2
US 10,579,300 · App. 15/912,815 · Granted Mar 3, 2020

Information handling system firmware persistent memory runtime reclaim

Inventors: Chris E. Pepper (Leander, TX); Justin W. Johnson (Austin, TX); Allen C. Wynn (Round Rock, TX)
Assignee: Dell Products L.P.
G06F3/0652G06F3/064G06F9/4406G06F2212/202
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Quick Facts
Patent No.
US 10,579,300
App. No.
15/912,815
Granted
Mar 3, 2020
Kind
B2
Abstract

Information handling system non-volatile random access memory (NVRAM) that stores operating system variables is managed to prevent a memory full condition by erasing selected portions of the NVRAM during operating system state transitions. If a first bank of NVRAM reaches a memory full condition threshold, active variables are copied to a second back of NVRAM and at least a portion of the first bank of NVRAM is erased during an operating system state transition from an on state to a reduced power and/or off state.

Claims (39)

1. An information handling system comprising:

a processor operable to execute instructions that process information;

a memory interfaced with the processor and operable to store the instructions and information;

a persistent storage device interfaced with the processor and storing an operating system operable to execute on the processor;

non-volatile memory interfaced with the processor and accessible by the operating system to read and write values; and

a memory manager interfaced with the non-volatile memory, the memory manager operable to detect a predetermined memory full threshold during an operating system runtime write to the non-volatile memory and, in response to detecting the predetermined memory full threshold, to move active values from a first block of the non-volatile memory to a second block of the non-volatile memory, to point the operating system to the second block of the non-volatile memory instead of the first block of non-volatile memory, to schedule an erase of the first block of the non-volatile memory in response to an operating system state change, to classify values in the first block of non-volatile memory as inactive if the values are marked as deleted, and to copy only active and not inactive values from the first block of non-volatile memory to the second block of non-volatile memory in response to detecting the memory full threshold;

wherein:

the operating system state change comprises a transition to an S3 sleep state; and

the erase comprises a portion of less than all of the first block of non-volatile memory.

2. An information handling system comprising:

a processor operable to execute instructions that process information;

a memory interfaced with the processor and operable to store the instructions and information;

a persistent storage device interfaced with the processor and storing an operating system operable to execute on the processor;

non-volatile memory interfaced with the processor and accessible by the operating system to read and write values; and

a memory manager interfaced with the non-volatile memory, the memory manager operable to detect a predetermined memory full threshold during an operating system runtime write to the non-volatile memory and, in response to detecting the predetermined memory full threshold, to move active values from a first block of the non-volatile memory to a second block of the non-volatile memory, to point the operating system to the second block of the non-volatile memory instead of the first block of non-volatile memory, to schedule an erase of the first block of the non-volatile memory in response to an operating system state change, to classify values in the first block of non-volatile memory as inactive if the values are marked as deleted, and to copy only active and not inactive values from the first block of non-volatile memory to the second block of non-volatile memory in response to detecting the memory full threshold;

wherein the memory manager is further operable to:

detect a predetermined memory full threshold associated with the second block of non-volatile memory;

in response to the memory full threshold, set the entire first block of non-volatile memory to erase at a sleep state; and

initiate a transition into and out of sleep state.

3. The information handling system of claim 2 wherein the memory manager is further operable to copy active values from the second block of non-volatile memory to the first block of non-volatile memory at transition out of the sleep state.

4. A method for managing non-volatile memory, the method comprising:

detecting a predetermined memory full condition associated with a first block of the non-volatile memory;

in response to the detecting, copying active variables from the first block of the non-volatile memory to a second block of the non-volatile memory; and

setting the first block of the non-volatile memory to erase at a predetermined operating system state transition;

pointing the operating system to the second block of the non-volatile memory instead of the first block of non-volatile memory; and

writing operating system variable updates to the second block of non-volatile memory;

wherein:

the operating system state transition comprises a transition to an S3 power state;

only a portion of the first block of non-volatile memory erases.

5. The method of claim 4 further comprising:

marking the erased portion as available to store variables; and

writing operating system variable updates to the erased portion.

6. A method for managing non-volatile memory, the method comprising:

detecting a predetermined memory full condition associated with a first block of the non-volatile memory;

in response to the detecting, copying active variables from the first block of the non-volatile memory to a second block of the non-volatile memory;

setting the first block of the non-volatile memory to erase at a predetermined operating system state transition;

detecting a predetermined memory full condition associated with the second block of the non-volatile memory;

in response to the detecting, initiating a transition to and from a sleep state; and

erasing at least a portion of the first block of the non-volatile memory during the sleep state.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (046366/0014) Recorded May 20, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 060450/0306 →
RELEASE OF SECURITY INTEREST AT REEL 046286 FRAME 0653 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 058298/0093 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Jun 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 046366/0014 →
PATENT SECURITY AGREEMENT (CREDIT) Recorded Jun 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 046286/0653 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 6, 2018
From: PEPPER, CHRIS E.; JOHNSON, JUSTIN W.; WYNN, ALLEN C.
To: DELL PRODUCTS L.P.
Reel/Frame 045116/0857 →