Hardware-based operating point controller for circuit regions in an integrated circuit

1. An apparatus, comprising:

an operating point controller configured to:

i) manage transitions between multiple operating points for one or more circuit regions in an integrated circuit,

ii) change a resource state, including operating voltage and operating frequency, for at least a first circuit region of the one or more circuit regions, wherein the resource state is determined by a currently selected operating point from the multiple operating points for the first circuit region, and

iii) identify events to initiate transitions between the multiple operating points for the first circuit region,

wherein the operating point controller is implemented in hardware logic that identifies the events and manages transitions between the multiple operating points, including changing resource states, and wherein the hardware logic comprises:

an operating point state controller;

a voltage, frequency, and temperature controller configured to provide temperature compensation for the operating voltage and the operating frequency of the first circuit region of the one or more circuit regions; and

one or more operating point tables populated with a plurality of operating points for the one or more circuit regions.

2. The apparatus of claim 1 , wherein the operating point state controller is configured to perform look ups into the one or more operating point tables based on the events; and

wherein the voltage, frequency, and temperature controller is configured to send required operating voltage and operating frequency information based on operating point information from the one or more operating point tables to corresponding system resources, including system voltage sources and system clocks associated with particular power domains.

3. The apparatus of claim 1 , wherein the apparatus further comprises an event matrix,

wherein the hardware logic of the operating point controller further includes an operating point event selector that is configured to cooperate with the event matrix, and wherein the operating point event selector maps incoming events from the event matrix to states and communicates the states to the operating point state controller to perform look ups into the one or more operating point tables based on the events.

4. The apparatus of claim 1 , wherein the voltage, frequency, and temperature controller is in communication with a voltage protocol adaptor and a frequency protocol adapter to provide a translation between a performance level and an actual mechanism to make the operating voltage and operating frequency changes for the first circuit region, and wherein the voltage protocol adaptor and the frequency protocol adapter communicate to the actual mechanism via a native interface supplied by a voltage regulator and/or a clock generator.

5. The apparatus of claim 1 , wherein the operating point controller is configured to cooperate with the one or more operating point tables populated with the plurality of operating points for the one or more circuit regions, where multiple operating points for a first circuit region of the one or more circuit regions include at least a choice between at least two different operating frequencies with associated different operating voltages, and wherein an operating voltage value associated with a lower operating frequency does not provide sufficient transistor speed to allow the first circuit region to function at the higher operating frequency.

6. The apparatus of claim 1 , wherein the operating point controller is configured to:

i) identify transition conditions to initiate operating point changes;

ii) identify a sequencing of circuits in the one or more circuit region required to transition between operating points;

iii) identify a sequencing of operating voltages needed to support a corresponding operating frequency; and

iv) send out control signals to system resources to cause the circuits in the one or more circuit regions to achieve a new operating point in an electrically safe manner without an undesired loss of circuit state,

wherein all of these actions occur under hardware control in the operating point controller without requesting assistance from any software operating on a central processing unit (CPU) processor.

7. The apparatus of claim 1 , wherein transitions of state occur faster in ther one or more circuit regions when the operating point controller is implemented in hardware logic than transitions of state implemented by the operating point controller using software operating on a CPU processor, and wherein faster transitions of state occurring in the one or more circuit regions translates to a greater savings in battery life than slow transitions.

8. The apparatus of claim 1 , wherein the operating point controller connects to power domain controllers to orchestrate, on a per state grouping, a sequencing for the transition of the power domains between higher and lower power states in a specific order definable by a designer of the integrated circuit into a programmable register.

9. The apparatus of claim 1 , wherein two or more operating point controllers connect to one or more shared resource arbitrators, and wherein the one or more shared resource arbitrators are configured to arbitrate among the two or more operating point controllers to determine values for the operating voltage and operating frequency to be supplied to shared system resources.

10. The apparatus of claim 8 , wherein the operating point controller is configured to sequence a turning on of power switches for each power domain controller it controls, wherein the operating point controller is configured to order the sequence of power domain controllers turned on from a compile-time static list of member power domain controllers, which determines when a given power domain controller is allowed to turn on its power switches relative to other power domain controllers.

11. A non-transitory machine-readable medium having data and instructions stored thereon, which, when executed by a machine, cause the machine to generate a representation of the apparatus of claim 1 , wherein the machine-readable medium stores an Electronic Design Automation (EDA) toolset used in a System-on-a-Chip design process that has the data and instructions to generate the representations of the apparatus.

12. An method, comprising:

configuring an operating point controller to manage transitions between multiple operating points for one or more circuit regions in an integrated circuit;

configuring the operating point controller to:

i) change a resource state, including operating voltage and operating frequency, for at least a first circuit region of the one or more circuit regions, wherein the resource state is determined by a currently selected operating point from the multiple operating points for the first circuit region; and

ii) identify events to initiate transitions between the multiple operating points for the first circuit region,

wherein the operating point controller is implemented in hardware logic that identifies the events and manages transitions between the multiple operating points, including changing resource states, without requiring any software to operate on any central processor unit (CPU) processor, and wherein the hardware logic comprises:

an operating point state controller;

a voltage, frequency, and temperature controller configured to provide temperature compensation for the operating voltage and the operating frequency of the first circuit region of the one or more circuit regions; and

one or more operating point tables populated with the multiple operating points for the one or more circuit regions.

13. An operating point controller produced from the process of claim 12 .

14. The method of claim 12 , the method further comprising:

configuring the operating point state controller to perform look ups into the one or more operating point tables based on the events, wherein the operating point state controller couples to a set of one or more power domain controllers to communicate operating point information from the one or more operating point tables to the one or more power domain controllers connected to the operating point controller based on the look up; and

configuring the voltage, frequency, and temperature controller in the operating point controller to send required operating voltage and operating frequency information based on the operating point information to corresponding system resources, including system voltage sources and system clocks associated with one or more power domains.

15. The method of claim 14 , the method further comprising:

configuring the voltage, frequency, and temperature controller in the operating point controller to communicate with a voltage protocol adaptor and a frequency protocol adapter to provide a translation between a performance level and an actual mechanism to make the operating voltage and operating frequency changes for the first circuit region, wherein the voltage protocol adaptor and the frequency protocol adapter communicate to the actual mechanism via a native interface supplied by a voltage regulator and/or a clock generator.

16. The method of claim 12 , the method further comprising:

configuring the operating point controller to cooperate with the one or more operating point tables populated with the multiple operating points for the one or more circuit regions, wherein multiple operating points for the first circuit region include at least a choice between at least two different operating frequencies with associated different operating voltages, and wherein an operating voltage value associated with a lower operating frequency does not provide sufficient transistor speed to allow the first circuit region to function at the higher operating frequency.

17. The method of claim 12 , the method further comprising:

configuring the operating point controller to:

i) identify transition conditions to initiate operating point changes;

ii) identify a sequencing of circuits in the one or more circuit regions required to transition between operating points;

iii) identify a sequencing of operating voltages needed to support a corresponding operating frequency; and

iv) send out control signals to system resources to cause the circuits in the one or more circuit regions to achieve a new operating point in an electrically safe manner without an undesired loss of circuit state,

wherein all of these actions occur under hardware control in the operating point controller without requesting assistance from any software operating on the CPU processor.

18. The method of claim 12 , the method further comprising:

configuring the operating point controller to connect to power domain controllers to orchestrate, on a per state grouping, a sequencing for the transition of the power domains between higher and lower power states in a specific order definable by a designer of the integrated circuit into a programmable register.

19. The method of claim 12 , the method further comprising:

configuring two or more operating point controllers to connect to one or more shared resource arbitrators, wherein the one or more shared resource arbitrators are configured to arbitrate among the two or more operating point controllers to determine values for the operating voltage and operating frequency to be supplied to shared system resources.

20. The method of claim 18 , the method further comprising:

configuring the operating point controller to sequence a turning on of power switches for each power domain controller it controls, wherein the operating point controller is configured to order the sequence of power domain controllers turned on from a compile-time static list of member power domain controllers, which determines when a given power domain controller is allowed to turn on its power switches relative to other power domain controllers.