Nonvolatile semiconductor memory device

1. A method of performing a reading operation in a nonvolatile semiconductor memory device, the nonvolatile semiconductor memory device including a memory cell array which comprises: a memory string having a plurality of memory cells connected in series therein; a first select transistor connected to one end of the memory string; a second select transistor connected to the other end of the memory string; a bit line connected to the memory string via the first select transistor; a source line connected to the memory string via the second select transistor; and a word line connected to a control gate electrode of each of the memory cells, the method of performing a reading operation being configured to apply the control gate electrode of a selected memory cell of the memory cells in the memory string with a reading voltage to determine whether the selected memory cell is conductive or not, and to apply the control gate electrode of a non-selected memory cell other than the selected memory cell in the memory string with a reading pass voltage to render the non-selected memory cell conductive regardless of data stored in the non-selected memory cell, the method comprising:

performing a first reading operation for a first memory cell as the selected memory cell, the first reading operation being configured to apply the control gate electrode of a second memory cell as the non-selected memory cell with a first reading pass voltage; and

performing a second reading operation for the first memory cell, the second reading operation being configured to apply the control gate electrode of the second memory cell with a second reading pass voltage having a value different from that of the first reading pass voltage.

2. The method of performing a reading operation in a nonvolatile semiconductor memory device according to claim 1 , wherein

the performing the second reading operation includes applying the source line with a source line voltage which is a positive voltage value.

3. The method of performing a reading operation in a nonvolatile semiconductor memory device according to claim 1 , wherein

each of the memory cells is configured capable of having therein a first threshold voltage distribution, a second threshold voltage distribution, a third threshold voltage distribution and a fourth threshold voltage distribution that have values ascending in an order of the first, second, third and fourth threshold voltage distributions, and

the performing the first reading operation and the performing the second reading operation respectively including applying the control gate electrode of the second memory cell with the first reading pass voltage in the first reading operation and applying the control gate electrode of the second memory cell with the second reading pass voltage in the second reading operation in any of cases of determining whether a threshold voltage of the first memory cell is in a range within the second threshold voltage distribution and over the second threshold voltage distribution, determining whether the threshold voltage of the first memory cell is in a range within the third threshold voltage distribution and over the third threshold voltage distribution, and determining whether the threshold voltage of the first memory cell is in a range within the fourth threshold voltage distribution and over the fourth threshold voltage distribution.

4. The method of performing a reading operation in a nonvolatile semiconductor memory device according to claim 3 , wherein

the performing the second reading operation includes applying the source line with a source line voltage which is a positive voltage value in any of cases of determining whether the threshold voltage of the first memory cell is in a range within the second threshold voltage distribution and over the second threshold voltage distribution, determining whether the threshold voltage of the first memory cell is in a range within the third threshold voltage distribution and over the third threshold voltage distribution, and determining whether the threshold voltage of the first memory cell is in a range within the fourth threshold voltage distribution and over the fourth threshold voltage distribution.

5. The method of performing a reading operation in a nonvolatile semiconductor memory device according to claim 1 , wherein

the performing the first reading operation includes applying the control gate electrode of the first memory cell with a first reading voltage for determining whether the first memory cell holds a predetermined threshold voltage distribution state or not, and

the performing the second reading operation includes applying the control gate electrode of the first memory cell with a second reading voltage for determining whether the first memory cell holds the predetermined threshold voltage distribution state or not, the second reading voltage having a value smaller than that of the first reading voltage.

6. The method of performing a reading operation in a nonvolatile semiconductor memory device according to claim 1 , wherein

the performing the second reading operation includes applying the control gate electrode of the second memory cell with the second reading pass voltage having a value smaller than that of the first reading pass voltage.

7. The method of performing a reading operation in a nonvolatile semiconductor memory device according to claim 1 , wherein

the first reading pass voltage and the second reading pass voltage are applied to the control gate electrode of the second memory cell adjoining the first memory cell in the memory string in the first reading operation and in the second reading operation.

8. A method of performing a reading operation in a nonvolatile semiconductor memory device, the nonvolatile semiconductor memory device including a memory cell array which comprises: a memory string having a plurality of memory cells connected in series therein; a first select transistor connected to one end of the memory string; a second select transistor connected to the other end of the memory string; a bit line connected to the memory string via the first select transistor; a source line connected to the memory string via the second select transistor; and a word line connected to a control gate electrode of each of the memory cells, the method of performing a reading operation being configured to apply the control gate electrode of a first memory cell of the memory cells selected in the memory string with a reading voltage to determine whether the first memory cell is conductive or not, and to apply the control gate electrode of a second memory cell other than the first memory cell in the memory string with a reading pass voltage to render the second memory cell conductive regardless of data stored in the second memory cell, the method comprising:

performing a first reading operation configured to set a voltage of the control gate electrode relative to a voltage of a source of the first memory cell to a first value and to apply the control gate electrode of the second memory cell with a first reading pass voltage; and

performing a second reading operation configured to set the voltage of the control gate electrode relative to the voltage of the source of the first memory cell to a voltage value which is smaller than the first value and to apply the control gate electrode of the second memory cell with a second reading pass voltage having a value different from that of the first reading pass voltage.

9. The method of performing a reading operation in a nonvolatile semiconductor memory device according to claim 8 , wherein

the performing the second reading operation includes applying the source line with a source line voltage which is a positive voltage value.

10. The method of performing a reading operation in a nonvolatile semiconductor memory device according to claim 8 , wherein

the performing the first reading operation includes applying the control gate electrode of the first memory cell with a first reading voltage for determining whether the first memory cell holds a predetermined threshold voltage distribution state or not, and

the performing the second reading operation includes applying the control gate electrode of the first memory cell with a second reading voltage for determining whether the first memory cell holds the predetermined threshold voltage distribution state or not, the second reading voltage having a value smaller than that of the first reading voltage.

11. The method of performing a reading operation in a nonvolatile semiconductor memory device according to claim 10 , wherein

the performing the second reading operation includes applying the control gate electrode of the second memory cell with the second reading pass voltage having a value smaller than that of the first reading pass voltage.

12. The method of performing a reading operation in a nonvolatile semiconductor memory device according to claim 8 , wherein

each of the memory cells is configured capable of having therein a first threshold voltage distribution, a second threshold voltage distribution, a third threshold voltage distribution and a fourth threshold voltage distribution that have values ascending in an order of the first, second, third and fourth threshold voltage distributions,

the performing the first reading operation and the performing the second reading operation include setting conditions such that, in any of cases of a first determination, a second determination, and a third determination, the voltage of the control gate electrode relative to the voltage of the source of the first memory cell is smaller during the second reading operation than during the first reading operation, the first determination determining whether a threshold voltage of the first memory cell is in a range within the second threshold voltage distribution and over the second threshold voltage distribution, the second determination determining whether the threshold voltage of the first memory cell is in a range within the third threshold voltage distribution and over the third threshold voltage distribution, and the third determination determining whether the threshold voltage of the first memory cell is in a range within the fourth threshold voltage distribution and over the fourth threshold voltage distribution.

13. The method of performing a reading operation in a nonvolatile semiconductor memory device according to claim 12 , wherein

the performing the second reading operation includes keeping the voltage of the control gate electrode of the first memory cell at 0 or a positive value.

14. The method of performing a reading operation in a nonvolatile semiconductor memory device according to claim 12 , wherein

the performing the first reading operation and the performing the second reading operation respectively include applying the control gate electrode of the second memory cell with the first reading pass voltage in the first reading operation and applying the control gate electrode of the second memory cell with the second reading pass voltage having a value smaller than that of the first reading pass voltage in the second reading operation in any of cases of the first determination, the second determination, and the third determination.

15. The method of performing a reading operation in a nonvolatile semiconductor memory device according to claim 8 , wherein

the first reading pass voltage and the second reading pass voltage are applied to the control gate electrode of the second memory cell adjoining the first memory cell in the memory string in the first reading operation and in the second reading operation.

16. A method of performing a reading operation in a nonvolatile semiconductor memory device, the nonvolatile semiconductor memory device including a memory cell array which comprises: a memory string having a plurality of memory cells connected in series therein, each of the memory cells being configured capable of having therein a first threshold voltage distribution, a second threshold voltage distribution, a third threshold voltage distribution and a fourth threshold voltage distribution that have values ascending in an order of the first, second, third and fourth threshold voltage distributions; a first select transistor connected to one end of the memory string; a second select transistor connected to the other end of the memory string; a bit line connected to the memory string via the first select transistor; a source line connected to the memory string via the second select transistor; and a word line connected to a control gate electrode of each of the memory cells, the method of performing a reading operation being configured to apply the control gate electrode of a first memory cell of the memory cells selected in the memory string with a reading voltage to determine whether the first memory cell is conductive or not, and to apply the control gate electrode of a second memory cell other than the first memory cell in the memory string with a reading pass voltage to render the second memory cell conductive regardless of data stored in the second memory cell, the method comprising:

performing a first reading operation and a second reading operation that each includes a first determination, a second determination, and a third determination, under setting conditions such that, in any of cases of the first determination, the second determination, and the third determination, a voltage of the control gate electrode relative to a voltage of a source of the first memory cell is smaller during the second reading operation than during the first reading operation, the first determination determining whether a threshold voltage of the first memory cell is in a range within the second threshold voltage distribution and over the second threshold voltage distribution, the second determination determining whether the threshold voltage of the first memory cell is in a range within the third threshold voltage distribution and over the third threshold voltage distribution, and the third determination determining whether the threshold voltage of the first memory cell is in a range within the fourth threshold voltage distribution and over the fourth threshold voltage distribution,

the performing the second reading operation including applying the source line with the same positive voltage in the first determination, the second determination, and the third determination.

17. The method of performing a reading operation in a nonvolatile semiconductor memory device according to claim 16 , wherein

the performing the second reading operation includes keeping the voltage of the control gate electrode of the first memory cell at 0 or a positive value.

18. The method of performing a reading operation in a nonvolatile semiconductor memory device according to claim 16 , wherein

the performing the second reading operation includes applying a well where the memory cells are formed with a well voltage having a voltage value lower than that of the source line.

19. The method of performing a reading operation in a nonvolatile semiconductor memory device according to claim 16 , wherein

the second reading operation is performed when it is determined that correct reading is impossible by the first reading operation.

20. The method of performing a reading operation in a nonvolatile semiconductor memory device according to claim 16 , wherein

the second reading operation is performed when a result of the first reading operation cannot be error-corrected by ECC.