IP Library Granted Patent US 10,347,313
Granted Patent B2
US 10,347,313 · App. 15/915,654 · Granted Jul 9, 2019

Magnetic memory

Inventors: Naoharu Shimomura (Tokyo, JP); Tomoaki Inokuchi (Yokohama, JP); Katsuhiko Koui (Yokohama, JP); Yuzo Kamiguchi (Yokohama, JP); Hiroaki Yoda (Kawasaki, JP); Hideyuki Sugiyama (Kawasaki, JP)
Assignee: KABUSHIKI KAISHA TOSHIBA
G11C11/1675G11C11/161G11C11/18H01L27/228H01L43/06H01L43/08G11C11/1673
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Quick Facts
Patent No.
US 10,347,313
App. No.
15/915,654
Granted
Jul 9, 2019
Kind
B2
Abstract

According to one embodiment, a magnetic memory includes: magnetoresistive effect elements arranged on an conductive layer; and a first circuit which passes a write current through the conductive layer and applies a control voltage to the magnetoresistive effect elements, to write data including a first value and a second value into the magnetoresistive effect elements. The first circuit adjusts at least one of a write sequence of the first value and the second value, a current value of the write current, and a pulse width of the write current, on the basis of an arrangement of the first value and the second value in the data.

Claims (52)

1. A magnetic memory comprising:

magnetoresistive effect elements arranged on an conductive layer; and

a first circuit which passes a write current through the conductive layer and applies a control voltage to the magnetoresistive effect elements, to write data including a first value and a second value into the magnetoresistive effect elements,

wherein the first circuit adjusts at least one of a write sequence of the first value and the second value, a current value of the write current, and a pulse width of the write current, on the basis of an arrangement of the first value and the second value in the data.

2. The memory of claim 1 , wherein

the first circuit sets the current value of the write current on the basis of first information regarding a distribution of the current value of the write current in the conductive layer dependent on the arrangement of the first value and the second value in the data.

3. The memory of claim 1 , wherein

during writing of the data, the magnetoresistive effect elements include at least one selected element and at least one unselected element, and

the current value of the write current is set on the basis of a current value of a first current in the conductive layer for the selected element and a current value of the first current in the conductive layer for the unselected element when the first current is supplied to the conductive layer.

4. The memory of claim 3 , wherein

the current value of the write current is set to a value between a minimum value of the current value of the first current in the conductive layer for the selected elements and a maximum value of the current value of the first current in the conductive layer for the unselected elements.

5. The memory of claim 3 , wherein

the first current is a current supplied to the conductive layer to write data into the selected element in at least one of an experimental process, a test process, and a simulation process.

6. The memory of claim 1 , wherein

during writing of the data, the magnetoresistive effect elements include at least one selected element and at least one unselected element, and

the current value of the write current is set an average value of the magnetization switching threshold of the selected element and the magnetization switching threshold of the unselected element.

7. The memory of claim 6 , wherein

when the magnetoresistive effect elements include a plurality of selected elements, the magnetization switching threshold of the selected element is based on an average value of the magnetization switching thresholds of the plurality of selected elements, and

when the magnetoresistive effect elements include a plurality of unselected elements, the magnetization switching threshold of the unselected element is based on an average value of the magnetization switching thresholds of the plurality of unselected elements.

8. The memory of claim 1 , wherein

during writing of the data, the magnetoresistive effect elements include at least one selected element and at least one unselected element, and

the current value of the write current is set a value smaller than an average value of the magnetization switching threshold of the selected element and the magnetization switching threshold of the unselected element.

9. The memory of claim 8 , wherein

the current value of the write current has a following relationship:

Iw ≤(2 ×Ij×Ik )/( Ij+Ik )

where Iw is the current value of the write current, Ij is the magnetization switching threshold of the unselected element, and Ik is the magnetization switching threshold of the selected element.

10. The memory of claim 8 , wherein

when the magnetoresistive effect elements include a plurality of selected elements, the magnetization switching threshold of the selected element is based on an average value of the magnetization switching thresholds of the plurality of selected elements, and

when the magnetoresistive effect elements include a plurality of unselected elements, the magnetization switching threshold of the unselected element is based on an average value of the magnetization switching thresholds of the plurality of unselected elements.

11. The memory of claim 1 , wherein

the first circuit determines the write sequence in accordance with the arrangement of the first value and the second value in the data.

12. The memory of claim 1 , wherein

the write sequence includes

a first sequence in which the second value is written into one or more selected elements among the magnetoresistive effect elements after the first value is written into the magnetoresistive effect elements, and

a second sequence in which the first value is written into one or more selected elements among the magnetoresistive effect elements after the second value is written into the magnetoresistive effect elements, and

the first circuit selects one of the first sequence and the second sequence in accordance with the arrangement of the first value and the second value in the data.

13. The memory of claim 1 , further comprising:

a second circuit which holds second information indicating a relation between the arrangement of the first value and the second value in the data, and at least one of the write sequence, the current value of the write current, and the pulse width of the write current.

14. The memory of claim 13 , wherein

the first circuit sets a condition to write the data with reference to the second information on the basis of the data during a write operation.

15. The memory of claim 1 , wherein

the first circuit receives the data, and third information regarding a condition to write the data, and

the third information includes at least one of the write sequence, the current value of the write current, and the pulse width of the write current.

16. The memory of claim 1 , wherein

during writing of the data, the magnetoresistive effect elements include at least one selected element and at least one unselected element, and

the first circuit applies the control voltage having a first polarity to the selected element, and applies the control voltage having a second polarity to the unselected element.

17. The memory of claim 1 , wherein

each of the magnetoresistive effect elements includes a first magnetic layer, a second magnetic layer between the first magnetic layer and the conductive layer, and a nonmagnetic layer between the first magnetic layer and the second magnetic layer.

18. The memory of claim 17 , wherein

the first magnetic layer has a magnetization in a fixed state, and the second magnetic layer has a variable magnetization.

19. The memory of claim 17 , wherein

a direction of magnetization of the second magnetic layer is switched by a spin Hall effect.

Assignments (3)
RELEASE OF PATENT SECURITY INTERESTS Recorded May 5, 2025
From: UBS AG, STAMFORD BRANCH (SUCCESSOR TO CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH), AS TERM LOAN COLLATERAL AGENT; BANK OF AMERICA, N.A., AS ABL COLLATERAL AGENT
To: AVINTIV SPECIALTY MATERIALS, LLC (F/K/A AVINTIV SPECIALTY MATERIALS INC.); BERRY FILM PRODUCTS COMPANY, INC.; BERRY GLOBAL FILMS, LLC; BERRY GLOBAL, INC.; BERRY PLASTICS CORPORATION; BERRY PLASTICS FILMCO, INC.; BERRY PLASTICS HOLDING CORPORATION; BPREX HEALTHCARE PACKAGING INC.; COVALENCE SPECIALTY ADHESIVES LLC; FIBERWEB, INC.; FIBERWEB, LLC; KERR GROUP, LLC; LETICA CORPORATION; LETICA RESOURCES, INC.; PLIANT, LLC; ROLLPAK CORPORATION; F&S TOOL, INC.
Reel/Frame 071168/0009 →
FIRST LIEN INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Oct 31, 2019
From: M&H PLASTICS, INC.; RPC PACKAGING HOLDINGS (US), INC.; RPC LEOPARD HOLDINGS, INC.; LETICA CORPORATION; LETICA RESOURCES, INC.; RPC BRAMLAGE, INC.; RPC SUPERFOS US, INC.; GLOBAL CLOSURE SYSTEMS AMERICAN 1, INC.; RPC ZELLER PLASTIK LIBERTYVILLE, INC.; RPC PROMENS INC.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH; BANK OF AMERICA, N.A.
Reel/Frame 050901/0770 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 2, 2018
From: SHIMOMURA, NAOHARU; INOKUCHI, TOMOAKI; KOUI, KATSUHIKO; KAMIGUCHI, YUZO; YODA, HIROAKI; SUGIYAMA, HIDEYUKI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 045697/0267 →
Priority Claims (2)
JP 2017-181110 · Sep 21, 2017 · national
JP 2018-035239 · Feb 28, 2018 · national
Continuity (1)
Related Publication 20190088302A1 · Mar 21, 2019