IP Library Granted Patent US 11,182,148
Granted Patent B2
US 11,182,148 · App. 15/919,444 · Granted Nov 23, 2021

System and method for automated BIOS recovery after BIOS corruption

Inventors: Wei Liu (Austin, TX); Po-Yu (Smith) Cheng (Tainan, TW)
Assignee: Dell Products L.P.
G06F8/654G06F9/4401G06F11/1417
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Quick Facts
Patent No.
US 11,182,148
App. No.
15/919,444
Granted
Nov 23, 2021
Kind
B2
Abstract

A method includes determining that initial boot block (IBB) firmware at an information handling system is invalid. The method further includes identifying that a redundant copy of the IBB firmware is stored at the information handling system, and executing the redundant copy of the IBB firmware.

Claims (44)

1. A method, comprising:

executing, by a platform security processor operating in an information handling system, in response to an application of electrical power, a single boot-up procedure performing an automated verification of a basic input/output system (BIOS) firmware;

identifying, by the platform security processor executing the single boot-up procedure, a non-volatile random access memory (NVRAM) storing a basic input/output system (BIOS) image, the BIOS image including: an initial boot block (IBB) including IBB instructions, the IBB instructions being instructions of the BIOS image first executed by an x86 central processing unit during initialization of the information handling system, the IBB stored at a first sector of the NVRAM, a sector being a unit of storage erased during an NVRAM erase operation; and

second instructions executed during a pre-Extensible Firmware Interface (PEI) phase of the initialization, the second instructions validated by the IBB instructions;

determining, by the platform security processor executing the single boot-up procedure, that an interruption of the electrical power corrupted the IBB stored at the first sector of the NVRAM by failing the automated verification executed during the single boot-up procedure;

in response to the interruption of the electrical power corrupting the IBB stored at the first sector of the NVRAM, identifying, by the platform security processor during the executing of the single boot-up procedure, a redundant copy of the IBB is stored at a second sector of the NVRAM, the second sector different than the first sector; and

continuing executing the single boot-up procedure using the redundant copy of the IBB identified by the platform security processor.

2. The method of claim 1 , further comprising automatically releasing the redundant copy of the IBB.

3. The method of claim 1 , further comprising determining, by the platform security processor executing the single boot-up procedure, that the redundant copy of the IBB is valid by passing the automated verification.

4. The method of claim 1 , wherein in response to the platform security processor determining the portion of the IBB is invalid, further comprising setting a flag.

5. The method of claim 1 , further comprising determining a block associated with the IBB fails the automated verification executed by the platform security processor.

6. The method of claim 1 , further comprising loading the redundant copy of the IBB.

7. The method of claim 1 , further comprising validating the redundant copy of the IBB.

8. The method of claim 1 , further comprising launching an operating system after completing the single boot-up procedure using the redundant copy of the IBB.

9. An information handling system comprising:

a central processing unit;

a system memory;

a non-volatile random access memory (NVRAM) to store a basic input/output system (BIOS) image, the BIOS image including:

platform security processor (PSP) firmware, the PSP firmware stored at a first sector of the NVRAM, a sector being a unit of storage erased during an NVRAM erase operation;

an initial boot block (IBB) including IBB instructions, the IBB instructions being instructions of the BIOS image first executed by an x86 central processing unit during initialization of the information handling system, the IBB validated during the initialization by the PSP firmware; and

second instructions executed during a pre-Extensible Firmware Interface (PEI) phase of the initialization, the second instructions validated by the IBB instructions; and

a PSP to execute instructions to:

initiate a single boot-up procedure;

execute, during the single boot-up procedure, a software validation of the PSP firmware;

determine, during the single boot-up procedure, that an electrical power interruption corrupted the PSP firmware;

in response to the electrical power interruption corrupting the PSP firmware, identify a redundant copy of the PSP firmware stored at a second sector of the BIOS NVRAM, the second sector different than the first sector; and

continue executing, using the redundant copy of the PSP firmware, the single boot-up procedure.

10. The system of claim 9 , wherein the PSP is further configured to:

determine, during the single boot-up procedure, that the IBB is invalid;

identify, during the single boot-up procedure, a redundant copy of the IBB is stored at the information handling system; and

execute, during the single boot-up procedure, the redundant copy of the IBB.

11. The system of claim 10 , further comprising:

in response to executing the redundant copy of the IBB, performing a BIOS recovery procedure, during the single boot-up procedure, to update firmware stored at the BIOS NVRAM.

12. The system of claim 9 , wherein the PSP firmware is invalid due to corruption occurring during a firmware update procedure at the BIOS NVRAM.

13. The system of claim 9 , further comprising:

in response to executing the redundant copy of the PSP firmware, performing a BIOS recovery procedure to update firmware stored at the BIOS NVRAM.

14. The system of claim 9 , further comprising:

in response to executing the redundant copy of the PSP firmware, setting a flag at a register identifying that the redundant copy of the PSP firmware was executed.

15. A method comprising:

storing, by a platform security processor operating in an information handling system, an initial boot block (IBB) at a basic input/output system (BIOS) non-volatile random access memory (NVRAM), the IBB including instructions first executed by an x86 central processing unit during initialization of the information handling system to validate second instructions executed during a pre-Extensible Firmware Interface (PEI) phase of the initialization, the IBB stored at sectors of the NVRAM, each sector of the sectors being a unit of storage erased during an NVRAM erase operation;

storing a redundant copy of the IBB at different sectors of the BIOS NVRAM that are different from the sectors storing the IBB; and

executing, a single bootup procedure using the IBB;

determining during the single boot-up procedure, that an electrical power failure corrupted the IBB using a software validation; and

in response to the determining that the electrical power failure corrupted the IBB, continuing executing the single boot-up procedure using the redundant copy of the IBB stored at the different sectors.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (046366/0014) Recorded May 20, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 060450/0306 →
RELEASE OF SECURITY INTEREST AT REEL 046286 FRAME 0653 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 058298/0093 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2019
From: LIU, WEI; CHENG, PO-YU (SMITH)
To: DELL PRODUCTS, LP
Reel/Frame 049017/0179 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY AGREEMENT (CREDIT) Recorded Jun 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 046286/0653 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Jun 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 046366/0014 →