Flash memory testing according to error type pattern
View Patent ↗A storage method comprises storing a retry table; wherein the retry table recites a plurality of error type patterns, the error type patterns comprises a plurality of default error types; accessing data stored in the flash memory; wherein an access error caused when a control circuit reads the data, the control circuit reads the retry table and performs testing according to the error type patterns sequentially to determine a current error type of the access error, and the control circuit performs an adjusted accessing action according to the current error type.
1. A storage system, comprising:
a flash memory; and
a controller, coupled to the flash memory, the controller comprising:
a storage device, for storing a retry table; wherein the retry table recites a plurality of error type patterns, the error type patterns comprises a plurality of default error types; and
a control circuit, for accessing data stored in the flash memory; wherein an access error caused when the control circuit reads the data, the control circuit reads the retry table and performs testing according to the error type patterns sequentially to determine a current error type of the access error, and the control circuit performs an adjusted accessing action according to the current error type.
2. The storage system of claim 1 , wherein the default error types comprise a data retention type, and/or a read disturb type, and/or a higher temperature write and lower temperature read type.
3. The storage system of claim 2 , wherein the data stored in a first memory block of the flash memory, and the storage system further comprising:
a cache memory;
when the current error type is the read disturb type, the control circuit corrects a content stored in the first memory block by the error-correcting code (ECC) algorithm and copies the content to a second memory block and/or the cache memory.
4. The storage system of claim 2 , wherein the data stored in a first memory block of the flash memory;
when the current error type is the data retention type, the control circuit copies a content stored in the first memory block to a second memory block.
5. The storage system of claim 2 , wherein when the current error type is the higher temperature write and lower temperature read type or a lower temperature write and higher temperature read type, the control circuit adjusts an accessing voltage for reading the flash memory to read the correct data.
6. The storage system of claim 1 , wherein when the control circuit reads the retry table, the control circuit adjusts an accessing voltage for reading the flash memory according to a plurality sets of voltage shift values in the error type patterns, and the control circuit performs testing by reading the data adjusted by each set of the voltage shift values sequentially until the control circuit reads the correct data; when the control circuit reads the correct data, the control circuits determines the current error type of the access error according to the corresponding error type pattern having the set of the voltage shift values that generated the correct data.
7. A storage method, comprising:
storing a retry table; wherein the retry table recites a plurality of error type patterns, the error type patterns comprises a plurality of default error types;
accessing data stored in the flash memory; wherein an access error caused when a control circuit reads the data, the control circuit reads the retry table and performs testing according to the error type patterns sequentially to determine a current error type of the access error, and the control circuit performs an adjusted accessing action according to the current error type.
8. The storage method of claim 7 , wherein the default error types comprise a data retention type, and/or a read disturb type, and/or a higher temperature write and lower temperature read type.
9. The storage method of claim 8 , wherein the data stored in a first memory block of the flash memory, and the storage method further comprising:
when the current error type is the read disturb type, the control circuit corrects a content stored in the first memory block by the error-correcting code (ECC) algorithm and copies the content to a second memory block and/or a cache memory.
10. The storage method of claim 8 , wherein the data stored in a first memory block of the flash memory, and the storage method further comprising:
when the current error type is the data retention type, the control circuit copies a content stored in the first memory block to a second memory block.
11. The storage method of claim 8 , wherein when the current error type is the higher temperature write and lower temperature read type or a lower temperature write and higher temperature read type, the control circuit adjusts an accessing voltage for reading the flash memory to read the correct data.
12. The storage method of claim 7 , wherein when the control circuit reads the retry table, the control circuit adjusts an accessing voltage for reading the flash memory according to a plurality sets of voltage shift values in the error type patterns, and the control circuit performs testing by reading the data adjusted by each set of the voltage shift values sequentially until the control circuit reads the correct data; when the control circuit reads the correct data, the control circuits determines the current error type of the access error according to the corresponding error type pattern having the set of the voltage shift values that generated the correct data.