IP Library Granted Patent US 11,115,121
Granted Patent B2
US 11,115,121 · App. 15/931,166 · Granted Sep 7, 2021

Power amplifier system with an internal optical communication link

Inventors: Donald M. Wike (Corona, CA); Michael Berman (Los Angeles, CA); Darren Miles (Anaheim, CA); Paulo Correa (Dana Point, CA); Leonid Mogilevsky (Encino, CA); Marc Obbad (Escondido, CA)
Assignee: EMPOWER RF SYSTEMS, INC.
H04B10/2507H04B10/2581H04B10/2589
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Quick Facts
Patent No.
US 11,115,121
App. No.
15/931,166
Granted
Sep 7, 2021
Kind
B2
Abstract

Techniques for implementing an internal optical communication link in a power amplifier system are disclosed. In one embodiment, the techniques may be realized as a power amplifier system that includes a panel, an optical link, and a controller. The panel includes a plurality of signal endpoints and a first optical interface, the first optical interface being coupled to each of the plurality of signal endpoints. The optical link is coupled to the first optical interface. The controller is configured to manage operation of the power amplifier system and is coupled to the optical link via a second optical interface. The controller communicates with each of the plurality of signal endpoints over the optical link.

Claims (37)

1. A power amplifier system comprising:

a panel comprising a plurality of signal endpoints and a first optical interface, the first optical interface being coupled to each of the plurality of signal endpoints;

an optical link coupled to the first optical interface; and

a controller configured to manage operation of the power amplifier system, the controller being coupled to the optical link via a second optical interface, the controller communicating with each of the plurality of signal endpoints over the optical link.

2. The power amplifier of claim 1 , wherein the first optical interface and the second optical interface are serializer/deserializer (SerDes) interfaces.

3. The power amplifier of claim 1 , further comprising a radio frequency (RF) circuit that produces electromagnetic interference (EMI) within the power amplifier system.

4. The power amplifier system of claim 1 , wherein the plurality of signal endpoints include at least one of an input/output interface, an Ethernet interface, a device configured to receive commands, a device configured to receive control signals, a device that generates status information, a display port, a status indicator, a touch screen display, a peripheral interface controller (PIC), or a fan.

5. The power amplifier system of claim 1 , wherein the controller communicates over the optical link according to a communication standard.

6. The power amplifier system of claim 1 , wherein the controller communicates over the optical link using a pulse-width modulation (PWM) control signal.

7. The power amplifier system of claim 1 , further comprising an electrical interconnect that provides a communication link between each of the plurality of signal endpoints and the controller.

8. The power amplifier system of claim 1 , wherein the electrical interconnect provides a contingency route for the controller to communicate with each of the plurality of signal endpoints when the optical link is unavailable.

9. The power amplifier system of claim 1 , wherein the panel corresponds to a front panel of the power amplifier system, and wherein the power amplifier system further comprises:

a rear panel comprising a second plurality of signal endpoints and a third optical interface, the third optical interface being coupled to each of the second plurality of signal endpoints; and

a second optical link coupled to the third optical interface;

wherein the controller is coupled to the second optical link via a fourth optical interface, the controller communicating with each of the second plurality of signal endpoints over the second optical link.

10. The power amplifier of claim 1 , wherein the optical link comprises a multi-mode fiber.

11. The power amplifier of claim 1 , wherein the controller further comprises an electrical-to-optical engine and an optical-to-electrical engine, wherein the electrical-to-optical engine and the optical-to-electrical engine each perform multiplexing to provide one or more communication lanes over the optical link.

12. The power amplifier of claim 11 , wherein the one or more communication lanes include at least one of a transmit lane, a receive lane, or a bidirectional lane.

13. The power amplifier of claim 11 , wherein the one or more communication lanes include at last one dedicated communication lane that bypasses the second optical interface.

14. A method for communicating in a power amplifier system comprising:

communicating, by a controller configured to manage operation of the power amplifier system, via an optical interface, over an optical link, first information to or from a first signal endpoint of the power amplifier system;

communicating, by the controller, via the optical interface, over the optical link, second information to or from a second signal endpoint of the power amplifier system; and

communicating, by the controller, over a backup electrical interconnect, third information to or from at least one of the first signal endpoint or the second signal endpoint in response to determining that the optical link is unavailable.

15. The method of claim 14 , wherein the optical interface is a serializer/deserializer (SerDes) interface.

16. A method for communicating in a power amplifier system comprising:

communicating, by a controller configured to manage operation of the power amplifier system, via an optical interface, over an optical link, first information to or from a first signal endpoint of the power amplifier system;

communicating, by the controller, via the optical interface, over the optical link, second information to or from a second signal endpoint of the power amplifier system; and

multiplexing the first information and the second information to provide one or more communication lanes over the optical link, wherein the one or more communication lanes include at last one dedicated communication lane that bypasses the optical interface, and wherein at least one of the first information and the second information is communicated over the dedicated communication lane.

17. A system comprising:

an enclosure comprising:

a front panel comprising a first plurality of signal endpoints and a first optical interface, the first optical interface being coupled to each of the first plurality of signal endpoints; and

a rear panel comprising a second plurality of signal endpoints and a second optical interface, the second optical interface being coupled to each of the second plurality of signal endpoints;

an amplifier circuit disposed within the enclosure, the amplifier circuit generating electromagnetic interference (EMI) during operation;

a motherboard disposed within the enclosure, the motherboard comprising a third optical interface and a fourth optical interface;

a first optical link coupled between the first optical interface and the third optical interface, wherein the motherboard communicates each of the first plurality of signal endpoints over the first optical link; and

a second optical link coupled between the second optical interface and the fourth optical interface, wherein the motherboard communicates each of the second plurality of signal endpoints over the second optical link.

18. The system of claim 17 , further comprising an interconnect board disposed within the enclosure, the interconnect board providing a backup communication path between the motherboard and at least one of the first plurality of signal endpoints and the second plurality of signal endpoints.

Assignments (9)
SECURITY INTEREST Recorded Jul 14, 2026
From: ANTENNA RESEARCH ASSOCIATES, INCORPORATED, AS GRANTOR; S12 TECHNOLOGIES, INC., AS GRANTOR; EMPOWER RF SYSTEMS, INC., AS GRANTOR
To: BAIN CAPITAL CREDIT, LP, AS THE ADMINISTRATIVE AGENT
Reel/Frame 075267/0224 →
RELEASE OF SECURITY INTEREST Recorded Jul 14, 2026
From: BANC OF CALIFORNIA
To: EMPOWER RF SYSTEMS, INC.
Reel/Frame 075268/0687 →
RELEASE OF SECURITY INTEREST Recorded Jul 14, 2026
From: BANC OF CALIFORNIA, FORMERLY KNOWN AS PACIFIC WESTERN BANK (AS SUCCESSOR IN INTEREST BY MERGER TO SQUARE 1 BANK)
To: EMPOWER RF SYSTEMS, INC.
Reel/Frame 075268/0578 →
SECURITY INTEREST Recorded Jan 20, 2026
From: EMPOWER RF SYSTEMS, INC.
To: BANC OF CALIFORNIA
Reel/Frame 073518/0423 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CONVEYING PARTY DATA FROM EMPOWER RF SYSYEMS, INC. TO EMPOWER RF SYSTEMS, INC. PREVIOUSLY RECORDED UNDER REEL AND FRAME 061444/0185. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 21, 2024
From: EMPOWER RF SYSTEMS, INC.
To: BANC OF CALIFORNIA (FORMERLY KNOWN AS PACIFIC WESTERN BANK, SUCCESSOR IN INTEREST BY MERGER TO SQUARE 1 BANK)
Reel/Frame 068730/0975 →
SECURITY INTEREST Recorded Oct 17, 2022
From: EMPOWER RF SYSYEMS, INC.
To: PACIFIC WESTERN BANK, SUCCESSOR IN INTEREST BY MERGER TO SQUARE 1 BANK
Reel/Frame 061444/0185 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2021
From: OBBAD, MARC
To: EMPOWER RF SYSTEMS, INC.
Reel/Frame 055154/0767 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2020
From: WIKE, DONALD M.; BERMAN, MICHAEL; MILES, DARREN; CORREA, PAULO; MOGILEVSKY, LEONID
To: EMPOWER RF SYSTEMS, INC.
Reel/Frame 052660/0257 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2020
From: WIKE, DONALD M.; BERMAN, MICHAEL; MILES, DARREN; CORREA, PAULO; MOGILEVSKY, LEONID
To: EMPOWER RF SYSTEMS, INC.
Reel/Frame 052659/0918 →
Continuity (3)
Provisional Application 62856532 · Jun 3, 2019
Provisional Application 62847751 · May 14, 2019
Related Publication 20210028862A1 · Jan 28, 2021
Cited By (1)
US 12,255,685