IP Library Granted Patent US 11,289,701
Granted Patent B2
US 11,289,701 · App. 15/931,470 · Granted Mar 29, 2022

Structurally controlled deposition of silicon onto nanowires

Inventors: Weijie Wang (Sunnyvale, CA); Zuqin Liu (Sunnyvale, CA); Song Han (Foster City, CA); Jonathan Bornstein (Cupertino, CA); Constantin Ionel Stefan (San Jose, CA)
Assignee: Amprius, Inc.
H01M4/386H01M4/0428H01M4/134H01M4/1395H01M4/366H01M10/0525H01M10/052H01M2004/027
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Quick Facts
Patent No.
US 11,289,701
App. No.
15/931,470
Granted
Mar 29, 2022
Kind
B2
Abstract

Provided herein are nanostructures for lithium ion battery electrodes and methods of fabrication. In some embodiments, a nanostructure template coated with a silicon coating is provided. The silicon coating may include a non-conformal, more porous layer and a conformal, denser layer on the non-conformal, more porous layer. In some embodiments, two different deposition processes, e.g., a PECVD layer to deposit the non-conformal layer and a thermal CVD process to deposit the conformal layer, are used. Anodes including the nanostructures have longer cycle lifetimes than anodes made using either a PECVD or thermal CVD method alone.

Claims (30)

1. A method of making an anode for a lithium battery, comprising the steps of:

providing a substrate having nanowires attached thereto such that the nanowires have free ends and substrate-rooted ends;

depositing a first silicon layer over the nanowires using a PECVD method;

depositing a second silicon layer over the first silicon layer, the nanowires, and

the substrate using a thermal CVD method, wherein the first silicon layer has a thickness of between 0.5 and 50 microns at the free ends of the nanowires.

2. The method of claim 1 , wherein the first silicon layer has a thickness that varies in a direction vertical to the substrate.

3. The method of claim 1 , wherein the first silicon layer is non-conformal to the nanowires.

4. The method of claim 3 , wherein the second silicon layer is conformal to the surface it deposited on, including the first silicon layer, the substrate, and any exposed portion of the nanowires.

5. The method of claim 1 , wherein chamber pressure during the thermal CVD method is less than about 2 Torr.

6. The method of claim 1 , wherein the PECVD method is an expanding thermal plasma (ETP) method.

7. The method of claim 1 , wherein the first silicon layer is thicker at the free ends of the nanowires than at the substrate-rooted ends.

8. The method of claim 1 , wherein the second silicon layer has a thickness of between 10 and 500 nm thick.

9. The method of claim 1 , wherein the second silicon layer has a uniform thickness.

10. The method of claim 1 , wherein the first silicon layer has a thickness of between 0.5 and 10 microns at the free ends of the nanowires.

11. The method of claim 1 , wherein the first silicon layer has a thickness between 10 and 50 microns at the free ends of the nanowires.

12. The method of claim 1 , wherein the second silicon layer is amorphous.

13. A method of making an anode for a lithium battery, comprising the steps of:

providing a substrate having nanowires attached thereto;

depositing a first silicon layer over the nanowires using a PECVD method;

depositing a second silicon layer over the first silicon layer, the nanowires, and

the substrate using a thermal CVD method, wherein the second silicon layer is amorphous.

14. The method of claim 13 , wherein the PECVD method is an expanding thermal plasma (ETP) method.

15. The method of claim 13 , wherein the nanowires are silicide nanowires.

16. The method of claim 13 , wherein chamber pressure during the thermal CVD method is less than about 2 Torr.

17. The method of claim 13 , wherein the first silicon layer has a thickness that varies in a direction vertical to the substrate.

18. The method of claim 13 , wherein the first silicon layer is non-conformal to the nanowires.

19. The method of claim 18 , wherein the second silicon layer is conformal to the surface it deposited on, including the first silicon layer, the substrate, and any exposed portion of the nanowires.

20. The method of claim 13 , wherein the second silicon layer has a thickness of between 10 and 500 nm thick.

21. The method of claim 13 , wherein providing the substrate having nanowires attached thereto comprises growing the nanowires from the substrate.

22. The method of claim 13 , wherein the nanowires have free ends and substrate-rooted ends.

Assignments (3)
CONFIRMATORY ASSIGNMENT Recorded Feb 9, 2024
From: AMPRIUS, INC.
To: AMPRIUS TECHNOLOGIES, INC.
Reel/Frame 066548/0229 →
CONFIRMATORY ASSIGNMENT Recorded Jun 15, 2022
From: AMPRIUS, INC.
To: AMPRIUS TECHNOLOGIES, INC.
Reel/Frame 060455/0620 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 6, 2022
From: WANG, WEIJIE; LIU, ZUQIN; HAN, SONG; BORNSTEIN, JONATHAN; STEFAN, CONSTANTIN IONEL
To: AMPRIUS, INC.
Reel/Frame 059864/0772 →
Continuity (4)
Division 15887809 · Feb 2, 2018
Continuation 14710103 · May 12, 2015
Provisional Application 61992121 · May 12, 2014
Related Publication 20200274156A1 · Aug 27, 2020