IP Library Granted Patent US 10,367,458
Granted Patent B2
US 10,367,458 · App. 15/933,444 · Granted Jul 30, 2019

Signal amplifier

Inventor: Satoshi Azuhata (Tokyo, JP)
Assignee: PANASONIC INTELLECTUAL PROPERTY MANANGEMENT CO., LTD.
H03F3/217H03F3/2171H03F3/2173H03F3/45475H03F2200/03H03F2200/279H03F2200/351H03M1/504
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Quick Facts
Patent No.
US 10,367,458
App. No.
15/933,444
Granted
Jul 30, 2019
Kind
B2
Abstract

A signal amplifier includes a pulse width modulator, a level shifter, and a power amplifier. The pulse width modulator is driven by a positive power supply and a negative power supply, and a reference voltage of the pulse width modulator is set to a GND. The power amplifier is driven by a positive power supply, and a reference voltage of the power amplifier is set to a middle value between the positive power supply and the GND. The level shifter shifts a voltage level of a first PWM signal whose high level corresponds to the positive power supply of the pulse width modulator and whose low level corresponds to the negative power supply of the pulse width modulator, to a voltage level of a second PWM signal whose high level corresponds to the positive power supply of the power amplifier and whose low level corresponds to the GND.

Claims (12)

1. A signal amplifier, comprising:

a signal input to which an analog input signal of a differential form is input;

a pulse width modulator that performs pulse width modulation on the analog input signal input to the signal input to convert the analog input signal into a first pulse width modulation (PWM) signal;

a level shifter that shifts a voltage level of the first PWM signal output from the pulse width modulator to convert the first PWM signal into a second PWM signal;

a power amplifier that performs power amplification on the second PWM signal output from the level shifter to generate an analog output signal of a differential form from the second PWM signal;

a signal output that outputs the analog output signal of a differential form; and

an error amplifier to which the analog input signal is input and to which the analog output signal output from the signal output is input by being fed back and input to the error amplifier,

wherein the error amplifier outputs an error amplification signal that is generated by amplifying an error component between the analog input signal input to the error amplifier and the analog output signal fed back and input to the error amplifier,

the pulse width modulator is driven by a positive power supply and a negative power supply, and a reference voltage of the pulse width modulator is set to a ground (GND),

the pulse width modulator outputs the first PWM signal having a pulse width corresponding to a signal level of the error amplification signal,

the power amplifier is driven by the positive power supply, and a reference voltage of the power amplifier is set to a middle value between the positive power supply and the GND, and

the level shifter shifts the voltage level of the first PWM signal whose high level corresponds to the positive power supply of the pulse width modulator and whose low level corresponds to the negative power supply of the pulse width modulator, to a voltage level of the second PWM signal whose high level corresponds to the positive power supply of the power amplifier and whose low level corresponds to the GND.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2024
From: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
To: PANASONIC AUTOMOTIVE SYSTEMS CO., LTD.
Reel/Frame 066703/0177 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2018
From: AZUHATA, SATOSHI
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 046037/0406 →
Priority Claims (1)
JP 2017-069934 · Mar 31, 2017 · national
Continuity (1)
Related Publication 20180287574A1 · Oct 4, 2018
Cited By (1)
US 12,562,295