Multichannel input/output virtualization

1. A network device, comprising:

one or more processors; and

a memory coupled with and readable by the one or more processors, wherein the memory is configured to include a first portion of physical memory used by a host process for Input/Output (I/O) operations, wherein the host process is executing on the network device;

a packet processor including a first channel used by the host process for transmission or receipt of packets and a second channel used by a virtual machine for transmission or receipt of packets, wherein the virtual machine is executing on the network device; and

a memory management unit, the memory management unit configured to use an address map associated with the packet processor;

wherein the one or more processors execute instructions to perform operations including:

reserving a portion of the address map for the host process, the reserved portion including a first set of mappings that map a first set of virtual addresses to a set of addresses in the first portion of physical memory, wherein the host process uses the reserved portion to transmit or receive packets using the first channel; and

allocating a second portion of the address map for the virtual machine, wherein the second portion is allocated in a part of the address map that does not include the reserved portion, wherein the virtual machine uses the second portion to transmit or receive packets using the second channel.

2. The network device of claim 1 , wherein the host process configures the reserved portion of the address map, wherein configuring the reserved portion includes writing addresses from the first portion of physical memory into the reserved portion.

3. The network device of claim 1 , wherein a hypervisor configures the second portion of the address map.

4. The network device of claim 1 , wherein the host process is configured to use a virtual address to obtain a physical address, wherein the host process uses the reserved portion to obtain the physical address, wherein the physical address is an address in the first portion of physical memory, and wherein the virtual address is in a virtual address space of the virtual machine.

5. The network device of claim 1 , wherein the host process is configured to write a packet to the memory using a physical address.

6. The network device of claim 1 , wherein the virtual machine is configured to read a packet from the memory using a virtual address.

7. The network device of claim 1 , wherein the packet processor is configured to:

receive, on the second channel, a request to transmit a packet, wherein the request includes a virtual address;

obtain, using the reserved portion, a physical address for the virtual address;

read a packet from the memory using the physical address; and

transmit the packet.

8. The network device of claim 1 , wherein the packet processor is configured to:

receive, at the first channel, a packet;

obtain, using the second portion of the address map, a physical address for a virtual address, wherein the virtual address was configured by the virtual machine; and

write the packet to the memory using the physical address.

9. The network device of claim 1 , wherein the one or more processors further execute instructions to perform operations, including:

determining that the virtual machine is no longer executing;

starting a new virtual machine; and

allocating a third portion of the address map for the new virtual machine, wherein the third portion is allocated in a part of the address map that does not include the reserved portion, wherein the new virtual machine uses the third portion to transmit or received packets using the second channel.

10. The network device of claim 1 , wherein, when the virtual machine shuts down, the address map is preserved.

11. The network device of claim 1 , wherein the virtual machine is executing a network operating system.

12. The network device of claim 1 , wherein the host process includes a software keep-alive process.

13. A method, comprising:

reserving a portion of an address map for a host process, the reserved portion including a first set of mappings that map a first set of virtual addresses to a set of addresses in a first portion of physical memory, wherein the host process uses the reserved portion to transmit or receive packets using a first channel of a packet processor, wherein a memory management unit is configured to include the address map, wherein the address map is associated with the packet processor, and wherein the host process is executing on a network device; and

allocating a second portion of the address map for a virtual machine, wherein the second portion is allocated in a part of the address map that does not include the reserved portion, wherein the virtual machine uses the second portion to transmit or receive packets using a second channel of the packet processor, and wherein the virtual machine is executing on the network device.

14. The method of claim 13 , wherein the host process configures the reserved portion of the address map, wherein configuring the reserved portion includes writing addresses from the first portion of physical memory into the reserved portion.

15. The method of claim 13 , wherein a hypervisor configures the second portion of the address map.

16. The method of claim 13 , further comprising:

using a virtual address to obtain a physical address, wherein obtaining the physical address includes using the reserved portion to obtain the physical address, wherein the physical address corresponds to an address in the first portion of physical memory, and wherein the virtual address corresponds to a virtual address space of the virtual machine.

17. The method of claim 13 , further comprising:

writing a packet to memory using a physical address, wherein the packet is written to memory by the host process.

18. The method of claim 13 , further comprising:

reading a packet from memory using a virtual address, wherein the packet is read by the virtual machine.

19. A non-transitory computer-readable medium including instructions that, when executed by one or more processors, cause the one or more processors to perform operations including:

reserving a portion of an address map for a host process, the reserved portion including a first set of mappings that map a first set of virtual addresses to a set of addresses in a first portion of physical memory, wherein the host process uses the reserved portion to transmit or receive packets using a first channel of a packet processor, wherein a memory management unit is configured to include the address map, wherein the address map is associated with the packet processor, and wherein the host process is executing on a network device; and

allocating a second portion of the address map for a virtual machine, wherein the second portion is allocated in a part of the address map that does not include the reserved portion, wherein the virtual machine uses the second portion to transmit or receive packets using a second channel of the packet processor, and wherein the virtual machine is executing on the network device.

20. The non-transitory computer-readable medium of claim 19 , wherein the host process configures the reserved portion of the address map, wherein configuring the reserved portion includes writing addresses from the first portion of physical memory into the reserved portion.

21. The non-transitory computer-readable medium of claim 19 , wherein a hypervisor configures the second portion of the address map.

22. The non-transitory computer-readable medium of claim 19 , further comprising instructions that, when executed by one or more processors, cause the one or more processors to perform operations including:

using a virtual address to obtain a physical address, wherein obtaining the physical address includes using the reserved portion to obtain the physical address, wherein the physical address corresponds to an address in the first portion of physical memory, and wherein the virtual address corresponds to a virtual address space of the virtual machine.

23. The non-transitory computer-readable medium of claim 19 , further comprising instructions that, when executed by one or more processors, cause the one or more processors to perform operations including:

writing a packet to memory using a physical address, wherein the packet is written to memory by the host process.

24. The non-transitory computer-readable medium of claim 19 , further comprising instructions that, when executed by one or more processors, cause the one or more processors to perform operations including:

reading a packet from memory using a virtual address, wherein the packet is read by the virtual machine.