IP Library Granted Patent US 10,595,397
Granted Patent B2
US 10,595,397 · App. 15/940,314 · Granted Mar 17, 2020

Structure to dampen barrel resonance of unused portion of printed circuit board via

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Quick Facts
Patent No.
US 10,595,397
App. No.
15/940,314
Granted
Mar 17, 2020
Kind
B2
Abstract

A printed circuit board includes a first trace, a second trace, and a first via. The first trace is in a first conductive layer. The second trace is in a second conductive layer. The first via interconnects the first trace and the second trace, and communicates a first signal from the first trace to the second trace through a third conductive layer. The third conductive layer has a higher impedance than the first conductive layer and the second conductive layer.

Claims (49)

1. A method, comprising:

determining a length of an unused portion of a first via in a signal path of a printed circuit board;

determining a Nyquist frequency of a signal communicated on the signal path;

estimating a resonant frequency of the first via based on the length of the unused portion of the first via; and

in response to determining that the Nyquist frequency is approximately equal to the resonant frequency, plating a wall of the first via with a first conductive material having a higher resistivity than a second conductive material of the first via.

2. The method of claim 1 , wherein:

the printed circuit board includes a conductive layer;

the signal path includes a trace in the conductive layer coupled to the first via; and

the conductive layer is composed of a material other than the first conductive material.

3. The method of claim 1 , further comprising:

plating the wall of a second via of the printed circuit board with a material other than the first conductive material.

4. The method of claim 1 , wherein the first conductive material is tin.

5. The method of claim 1 , further comprising:

selecting the first conductive material based on a property of the signal.

6. A method, comprising:

providing a first trace in a first conductive layer of a printed circuit board;

providing a second trace in a second conductive layer of the printed circuit board;

plating a wall of a via with a third conductive layer to interconnect the first trace and the second trace, wherein the third conductive layer has a conductive material with a higher impedance than the first conductive layer and the second conductive layer; and

depositing a plating layer over the first trace and the third conductive layer, wherein the plating layer has a lower impedance than the conductive material of the third conductive layer.

7. The method of claim 6 , wherein prior to plating the wall of the first via, the method further comprising:

determining a length of an unused portion of the via in a signal path of the printed circuit board;

determining a Nyquist frequency of a signal communicated on the signal path;

estimating a resonant frequency of the via based on the length of the unused portion of the first via; and

determining that the Nyquist frequency is approximately equal to the resonant frequency.

8. The method of claim 6 , wherein a resistivity of the third conductive layer is greater than a resistivity of the first conductive layer and of the second conductive layer.

9. The method of claim 6 , further comprising:

communicating, by the first conductive layer, a first signal in a first conductive material; and

communicating, by the via, the first signal in a second conductive material.

10. The method of claim 9 , wherein the second conductive material comprises tin.

11. The method of claim 6 , further comprising:

selecting the third conductive material based on a property of the signal.

12. The method of claim 6 , wherein the via is a through via.

13. A method, comprising:

providing a first trace in a first conductive layer of a printed circuit board to provide a signal from a processor coupled to the printed circuit board;

providing a second trace in a second conductive layer of the printed circuit board;

determining a length of an unused portion of a first via in a signal path of the first conductive layer;

determining a Nyquist frequency of the signal communicated on the signal path;

estimating a resonant frequency of the via based on the length of the unused portion of the via; and

in response to determining that the Nyquist frequency is approximately equal to the resonant frequency, plating a wall of a via with a third conductive layer to interconnect the first trace and the second trace, wherein the third conductive layer has a conductive material with a higher impedance than the first conductive layer and the second conductive layer.

14. The method of claim 13 , further comprising:

depositing a plating layer over the first trace and the third conductive layer, wherein the plating layer has a lower impedance than the conductive material of the third conductive layer.

15. The method of claim 13 , wherein a resistivity of the third conductive layer is greater than a resistivity of the first conductive layer and of the second conductive layer.

16. The method of claim 13 , further comprising:

communicating, by the first conductive layer, a first signal in a first conductive material; and

communicating, by the via, the first signal in a second conductive material.

17. The method of claim 16 , wherein the second conductive material comprises tin.

18. The method of claim 13 , further comprising:

selecting the third conductive material based on a property of the signal.

19. The method of claim 13 , wherein the via is a through via.

Assignments (7)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (046366/0014) Recorded May 20, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 060450/0306 →
RELEASE OF SECURITY INTEREST AT REEL 046286 FRAME 0653 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 058298/0093 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Jun 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 046366/0014 →
PATENT SECURITY AGREEMENT (CREDIT) Recorded Jun 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 046286/0653 →