IP Library Granted Patent US 10,746,789
Granted Patent B2
US 10,746,789 · App. 15/941,479 · Granted Aug 18, 2020

Parametric pin measurement unit high voltage extension

Inventor: Patrick G. Sullivan (Forestville, CA)
G01R31/3004G01R19/0092G01R31/2834G01R31/2851
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Quick Facts
Patent No.
US 10,746,789
App. No.
15/941,479
Granted
Aug 18, 2020
Kind
B2
Abstract

An integrated circuit for measuring a signal, including a parametric pin measurement unit (PPMU) that sends a forced signal, the PPMU having a first amplifier, a second amplifier with an output terminal connected to the input terminals of the first amplifier through a common resistor; a voltage-to-current convertor connected to a PPMU output and having a first output and a second output; n channel MOSFETs connected to the first output of the voltage-to-current converter; p channel MOSFETs connected to the second output of the voltage-to-current converter; a buffered amplifier connected to an output port between the n channel MOSFETs and the p channel MOSFETs; and a resistance divider connected to the output of the buffered amplifier.

Claims (20)

1. An integrated circuit (IC) assembly for measuring a signal, comprising:

a parametric pin measurement unit (“PPMU”) having a current limit range and a voltage limit range and configured to send a forced signal, said PPMU having a first amplifier and a second amplifier with an output terminal of said second amplifier connected to the input terminals of said first amplifier through a common resistor, said PPMU having an output force terminal; and

a PPMU high voltage extension coupled to said output force terminal;

wherein said PPMU extension is configured to extend the voltage range or the current range of said PPMU to enable measurement of signal voltages higher than the voltage range of said PPMU while retaining the full feature set of said low voltage PPMU.

2. The IC assembly of claim 1 , wherein said PPMU high voltage extension includes:

(a) a voltage-to-current convertor connected to said output force terminal said voltage-to-current converter having a first output and a second output;

(b) a plurality of n channel MOSFETs connected to said first output of said voltage-to-current converter;

(c) a plurality of p channel MOSFETs connected to said second output of said voltage-to-current converter;

(d) a buffered amplifier connected to an output port between said plurality of n channel MOSFETs and said plurality of p channel MOSFETs and having an output applied to a terminal of said second amplifier of said PPMU; and

(e) a resistance divider connected to said output of said buffered amplifier, said resistance divider having a first resistor and a second resistor.

3. The IC assembly of claim 2 , wherein when a forced voltage is given at the positive terminal of said second amplifier and an output from said buffered amplifier is applied to the negative terminal of said second amplifier, a forced voltage mode of said parametric pin measurement unit results.

4. The IC assembly of claim 2 , wherein when a voltage representing a forced current is given at said negative terminal of said second amplifier and an output from said first amplifier is applied to the positive terminal of said second amplifier, a forced current mode of said parametric pin measurement unit results.

5. The IC assembly of claim 2 , wherein said plurality of n channel MOSFETs and the plurality of p channel MOSFETs acts as a current mirroring circuit.

6. The IC assembly of claim 2 , whereby when a forced voltage (VFORCE) is applied to the positive terminal of said second amplifier, current beyond the current range of said PPMU can be measured from the output port between said plurality of n channel MOSFETs and said plurality of p channel MOSFETs.

7. The IC assembly of claim 6 , wherein the forced voltage (VFORCE) applied to the positive terminal of said second amplifier is determined from the voltage value of the signal from said resistance divider.

8. The IC of claim 7 , wherein the voltage of said signal from said resistance divider is determined by the voltage at said output port buffered by said buffered amplifier and then divided by said resistance divider.

9. The IC of claim 7 , wherein said plurality of n channel MOSFETs and said plurality of p channel MOSFETs acts as a current mirroring circuit.

10. The IC of claim 2 , wherein said voltage-to-current converter converts the voltage from the output of said parametric pin measurement unit into a first current flowing to plurality of n channel MOSFETs through the first output and a second current flowing to the plurality of p channel MOSFETs through the second output.

11. The integrated circuit (IC) of claim 2 , wherein as the voltage from the output of said parametric pin measurement unit increases, the first current increases and drives the voltage at the output port higher.

12. The IC of claim 7 , wherein as the voltage from the output of said parametric pin measurement unit decreases, the second current increases and drives the voltage at the output port lower.

Assignments (1)
SECURITY INTEREST Recorded Jul 17, 2019
From: ELEVATE SEMICONDUCTOR, INC.
To: EAST WEST BANK
Reel/Frame 049781/0414 →
Continuity (3)
Continuation 14860643 · Sep 21, 2015
Provisional Application 62052958 · Sep 19, 2014
Related Publication 20180292453A1 · Oct 11, 2018