Asynchronous transceiver for on-vehicle electronic device
View Patent ↗An on-vehicle system comprises a Clock Extension Peripheral Interface (CXPI) bus and a device coupled to the CXPI bus. The device comprises a transceiver configured to: detect a baud rate clock signal and a phase difference between the baud rate clock signal and an input data signal that was generated asynchronously from the baud rate clock signal; obtain a timing from an edge of the baud rate clock signal based the phase difference; capture a value of the input data signal at the timing; and transmit the captured value as an output data signal over the CXPI bus.
1. A device comprising:
a transceiver configured to operate over a Clock Extension Peripheral Interface (CXPI) bus, wherein the transceiver comprises:
a detecting unit configured to detect a baud rate clock signal and a phase difference between the baud rate clock signal and an input data signal that was generated asynchronously from the baud rate clock signal;
a computing unit configured to compute a data capturing timing from an edge of the baud rate clock signal based the phase difference; and
a synchronization unit configured to capture a value of the input data signal at the data capturing timing and to output the captured value as an output data signal for transmission over the CXPI bus.
2. The device of claim 1 , wherein the computing unit is configured to adjust the data capturing timing from the edge of the baud rate clock signal based on whether processing of an ending bit of the input data signal is completed.
3. The device of claim 1 , wherein the device is configured to operate as a master node in a CXPI communication network.
4. The device of claim 3 , further comprising a controller integrally coupled to the transceiver, wherein the controller is configured to generate the baud rate clock signal.
5. The device of claim 1 , wherein the device is configured to operate as a slave node in a CXPI communication network.
6. The device of claim 5 , wherein the device is configured to receive the baud rate clock signal from a master node of the CXPI communication network.
7. The device of claim 1 , wherein the detecting unit is configured to detect the phase difference based on a predetermined lower limit and a predetermined upper limit of cycles of the baud rate clock signal.
8. A method of operating a transceiver over a Clock Extension Peripheral Interface (CXPI) bus, the method comprising:
detecting, by a detecting unit of the transceiver, a baud rate clock signal and a phase difference between the baud rate clock signal and an input data signal that was generated asynchronously from the baud rate clock signal;
computing, by a computing unit of the transceiver, a data capturing timing from an edge of the baud rate clock signal based the phase difference;
capturing, by a synchronization unit of the transceiver, a value of the input data signal at the data capturing timing; and
outputting, by the synchronization unit, the captured value as an output data signal for transmission over the CXPI bus.
9. The method of claim 8 , further comprising adjusting the data capturing timing from the edge of the baud rate clock signal based on whether processing of an ending bit of the input data signal is completed.
10. The method of claim 8 , wherein the transceiver is disposed in a master node device of a CXPI communication network.
11. The method of claim 10 , further comprising generating the baud rate clock signal by a controller of the master node device.
12. The method of claim 8 , wherein the transceiver is disposed in a slave node device of a CXPI communication network.
13. The method of claim 12 , further comprising receiving the baud rate clock signal from a master node device of the CXPI communication network.
14. The method of claim 8 , wherein detecting the phase difference comprises excluding cycles of the baud rate clock signal that are below a predetermined lower limit and above a predetermined upper limit.
15. An on-vehicle system comprising:
a Clock Extension Peripheral Interface (CXPI) bus;
a device coupled to the CXPI bus, the device comprising a transceiver configured to:
detect a baud rate clock signal and a phase difference between the baud rate clock signal and an input data signal that was generated asynchronously from the baud rate clock signal;
obtain compute a data capturing timing from an edge of the baud rate clock signal based the phase difference;
capture a value of the input data signal at the data capturing timing; and
transmit the captured value as an output data signal over the CXPI bus.
16. The system of claim 15 , wherein the transceiver is further configured to adjust the data capturing timing from the edge of the baud rate clock signal based on whether processing of an ending bit of the input data signal is completed.
17. The system of claim 15 , wherein the device is configured as a CXPI master node.
18. The system of claim 17 , wherein the device comprises a controller integrally coupled to the transceiver, and wherein the controller is configured to generate the baud rate clock signal.
19. The system of claim 15 , wherein the device is configured as a CXPI slave node.
20. The system of claim 19 , wherein the device is configured to receive the baud rate clock signal from a CXPI master node over the CXPI bus.